// ****************************************************************************** 
// Copyright     :  Copyright (C) 2018, Hisilicon Technologies Co. Ltd.
// File name     :  sysctrl_cfg_c_union_define.h
// Project line  :  ICT
// Department    :  ICT Processor Chipset Development Dep
// Author        :  xxx
// Version       :  1.0
// Date          :  2013/3/10
// Description   :  The description of xxx project
// Others        :  Generated automatically by nManager V4.2 
// History       :  xxx 2018/03/19 15:49:05 Create file
// ******************************************************************************

#ifndef __SYSCTRL_CFG_C_UNION_DEFINE_H__
#define __SYSCTRL_CFG_C_UNION_DEFINE_H__

/* Define the union U_SC_PLL0FCTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_0              : 1  ; /* [31] */
        unsigned int    pll0_foutvcopd     : 1  ; /* [30] */
        unsigned int    pll0_foutpostdivpd : 1  ; /* [29] */
        unsigned int    pll0_fout4phasepd  : 1  ; /* [28] */
        unsigned int    pll0_dacpd         : 1  ; /* [27] */
        unsigned int    pll0_dsmpd         : 1  ; /* [26] */
        unsigned int    pll0_pd            : 1  ; /* [25] */
        unsigned int    pll0_bypass        : 1  ; /* [24] */
        unsigned int    pll0_postdiv2      : 3  ; /* [23:21] */
        unsigned int    pll0_postdiv1      : 3  ; /* [20:18] */
        unsigned int    pll0_fbdiv         : 12  ; /* [17:6] */
        unsigned int    pll0_refdiv        : 6  ; /* [5:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL0FCTRL;

/* Define the union U_SC_PLL0FCTRL_FRAC */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_1     : 8  ; /* [31:24] */
        unsigned int    pll0_frac : 24  ; /* [23:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL0FCTRL_FRAC;

/* Define the union U_SC_PLL1FCTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_2              : 1  ; /* [31] */
        unsigned int    pll1_foutvcopd     : 1  ; /* [30] */
        unsigned int    pll1_foutpostdivpd : 1  ; /* [29] */
        unsigned int    pll1_fout4phasepd  : 1  ; /* [28] */
        unsigned int    pll1_dacpd         : 1  ; /* [27] */
        unsigned int    pll1_dsmpd         : 1  ; /* [26] */
        unsigned int    pll1_pd            : 1  ; /* [25] */
        unsigned int    pll1_bypass        : 1  ; /* [24] */
        unsigned int    pll1_postdiv2      : 3  ; /* [23:21] */
        unsigned int    pll1_postdiv1      : 3  ; /* [20:18] */
        unsigned int    pll1_fbdiv         : 12  ; /* [17:6] */
        unsigned int    pll1_refdiv        : 6  ; /* [5:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL1FCTRL;

/* Define the union U_SC_PLL1FCTRL_FRAC */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_3     : 8  ; /* [31:24] */
        unsigned int    pll1_frac : 24  ; /* [23:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL1FCTRL_FRAC;

/* Define the union U_SC_PLL2FCTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_4              : 1  ; /* [31] */
        unsigned int    pll2_foutvcopd     : 1  ; /* [30] */
        unsigned int    pll2_foutpostdivpd : 1  ; /* [29] */
        unsigned int    pll2_fout4phasepd  : 1  ; /* [28] */
        unsigned int    pll2_dacpd         : 1  ; /* [27] */
        unsigned int    pll2_dsmpd         : 1  ; /* [26] */
        unsigned int    pll2_pd            : 1  ; /* [25] */
        unsigned int    pll2_bypass        : 1  ; /* [24] */
        unsigned int    pll2_postdiv2      : 3  ; /* [23:21] */
        unsigned int    pll2_postdiv1      : 3  ; /* [20:18] */
        unsigned int    pll2_fbdiv         : 12  ; /* [17:6] */
        unsigned int    pll2_refdiv        : 6  ; /* [5:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL2FCTRL;

/* Define the union U_SC_PLL2FCTRL_FRAC */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_5     : 8  ; /* [31:24] */
        unsigned int    pll2_frac : 24  ; /* [23:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL2FCTRL_FRAC;

/* Define the union U_SC_PLL3FCTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_6              : 1  ; /* [31] */
        unsigned int    pll3_foutvcopd     : 1  ; /* [30] */
        unsigned int    pll3_foutpostdivpd : 1  ; /* [29] */
        unsigned int    pll3_fout4phasepd  : 1  ; /* [28] */
        unsigned int    pll3_dacpd         : 1  ; /* [27] */
        unsigned int    pll3_dsmpd         : 1  ; /* [26] */
        unsigned int    pll3_pd            : 1  ; /* [25] */
        unsigned int    pll3_bypass        : 1  ; /* [24] */
        unsigned int    pll3_postdiv2      : 3  ; /* [23:21] */
        unsigned int    pll3_postdiv1      : 3  ; /* [20:18] */
        unsigned int    pll3_fbdiv         : 12  ; /* [17:6] */
        unsigned int    pll3_refdiv        : 6  ; /* [5:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL3FCTRL;

/* Define the union U_SC_PLL3FCTRL_FRAC */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_7     : 8  ; /* [31:24] */
        unsigned int    pll3_frac : 24  ; /* [23:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL3FCTRL_FRAC;

/* Define the union U_SC_PLL4FCTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_8              : 1  ; /* [31] */
        unsigned int    pll4_foutvcopd     : 1  ; /* [30] */
        unsigned int    pll4_foutpostdivpd : 1  ; /* [29] */
        unsigned int    pll4_fout4phasepd  : 1  ; /* [28] */
        unsigned int    pll4_dacpd         : 1  ; /* [27] */
        unsigned int    pll4_dsmpd         : 1  ; /* [26] */
        unsigned int    pll4_pd            : 1  ; /* [25] */
        unsigned int    pll4_bypass        : 1  ; /* [24] */
        unsigned int    pll4_postdiv2      : 3  ; /* [23:21] */
        unsigned int    pll4_postdiv1      : 3  ; /* [20:18] */
        unsigned int    pll4_fbdiv         : 12  ; /* [17:6] */
        unsigned int    pll4_refdiv        : 6  ; /* [5:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL4FCTRL;

/* Define the union U_SC_PLL4FCTRL_FRAC */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_9     : 8  ; /* [31:24] */
        unsigned int    pll4_frac : 24  ; /* [23:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL4FCTRL_FRAC;

/* Define the union U_SC_PLL5FCTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_10             : 1  ; /* [31] */
        unsigned int    pll5_foutvcopd     : 1  ; /* [30] */
        unsigned int    pll5_foutpostdivpd : 1  ; /* [29] */
        unsigned int    pll5_fout4phasepd  : 1  ; /* [28] */
        unsigned int    pll5_dacpd         : 1  ; /* [27] */
        unsigned int    pll5_dsmpd         : 1  ; /* [26] */
        unsigned int    pll5_pd            : 1  ; /* [25] */
        unsigned int    pll5_bypass        : 1  ; /* [24] */
        unsigned int    pll5_postdiv2      : 3  ; /* [23:21] */
        unsigned int    pll5_postdiv1      : 3  ; /* [20:18] */
        unsigned int    pll5_fbdiv         : 12  ; /* [17:6] */
        unsigned int    pll5_refdiv        : 6  ; /* [5:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL5FCTRL;

/* Define the union U_SC_PLL5FCTRL_FRAC */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_11    : 8  ; /* [31:24] */
        unsigned int    pll5_frac : 24  ; /* [23:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL5FCTRL_FRAC;

/* Define the union U_SC_PLL_CLK_BYPASS0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_12                 : 26  ; /* [31:6] */
        unsigned int    pll5_bypass_external_n : 1  ; /* [5] */
        unsigned int    pll4_bypass_external_n : 1  ; /* [4] */
        unsigned int    pll3_bypass_external_n : 1  ; /* [3] */
        unsigned int    pll2_bypass_external_n : 1  ; /* [2] */
        unsigned int    pll1_bypass_external_n : 1  ; /* [1] */
        unsigned int    pll0_bypass_external_n : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL_CLK_BYPASS0;

/* Define the union U_SC_PLL_CLK_BYPASS1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_13         : 26  ; /* [31:6] */
        unsigned int    pll5_peri_mode : 1  ; /* [5] */
        unsigned int    pll4_peri_mode : 1  ; /* [4] */
        unsigned int    pll3_peri_mode : 1  ; /* [3] */
        unsigned int    pll2_peri_mode : 1  ; /* [2] */
        unsigned int    pll1_peri_mode : 1  ; /* [1] */
        unsigned int    pll0_peri_mode : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL_CLK_BYPASS1;

/* Define the union U_SC_PLLCTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_14    : 4  ; /* [31:28] */
        unsigned int    pll_time  : 25  ; /* [27:3] */
        unsigned int    rsv_15    : 1  ; /* [2] */
        unsigned int    pll_en_sw : 1  ; /* [1] */
        unsigned int    pll_over  : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLLCTRL;

/* Define the union U_SC_SYSMODE_CTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_16   : 29  ; /* [31:3] */
        unsigned int    modectrl : 3  ; /* [2:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SYSMODE_CTRL;

/* Define the union U_SC_HPM_CLK_SEL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_17      : 31  ; /* [31:1] */
        unsigned int    hpm_clk_sel : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_HPM_CLK_SEL;

/* Define the union U_SC_MBIST_CPUI_CLK_SEL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_18             : 31  ; /* [31:1] */
        unsigned int    func_mbist_clk_sel : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MBIST_CPUI_CLK_SEL;

/* Define the union U_SC_PLL0_OUT_CLK_SEL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_19           : 31  ; /* [31:1] */
        unsigned int    pll0_out_clk_sel : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL0_OUT_CLK_SEL;

/* Define the union U_SC_ALL_SCAN_CTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_20           : 31  ; /* [31:1] */
        unsigned int    all_scan_sys_int : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ALL_SCAN_CTRL;

/* Define the union U_SC_SYSSOFTRST_CTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sys_soft_rst : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SYSSOFTRST_CTRL;

/* Define the union U_SC_PORN_ENABLE */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_21      : 31  ; /* [31:1] */
        unsigned int    porn_enable : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PORN_ENABLE;

/* Define the union U_SC_SDMA_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_22      : 31  ; /* [31:1] */
        unsigned int    icg_en_sdma : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SDMA_CLK_EN;

/* Define the union U_SC_SDMA_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_23       : 31  ; /* [31:1] */
        unsigned int    icg_dis_sdma : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SDMA_CLK_DIS;

/* Define the union U_SC_FTE_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_24     : 31  ; /* [31:1] */
        unsigned int    icg_en_fte : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_FTE_CLK_EN;

/* Define the union U_SC_FTE_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_25      : 31  ; /* [31:1] */
        unsigned int    icg_dis_fte : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_FTE_CLK_DIS;

/* Define the union U_SC_SMMU_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_26      : 31  ; /* [31:1] */
        unsigned int    icg_en_smmu : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SMMU_CLK_EN;

/* Define the union U_SC_SMMU_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_27       : 31  ; /* [31:1] */
        unsigned int    icg_dis_smmu : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SMMU_CLK_DIS;

/* Define the union U_SC_RGMII_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_28               : 26  ; /* [31:6] */
        unsigned int    icg_en_rgmii_bus     : 1  ; /* [5] */
        unsigned int    icg_en_rgmii_gsf_axi : 1  ; /* [4] */
        unsigned int    icg_en_rgmii_sys_pub : 1  ; /* [3] */
        unsigned int    icg_en_rgmii_gsf_125 : 1  ; /* [2] */
        unsigned int    icg_en_rgmii_crg_125 : 1  ; /* [1] */
        unsigned int    icg_en_rgmii_rx      : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_RGMII_CLK_EN;

/* Define the union U_SC_RGMII_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_29                : 26  ; /* [31:6] */
        unsigned int    icg_dis_rgmii_bus     : 1  ; /* [5] */
        unsigned int    icg_dis_rgmii_gsf_axi : 1  ; /* [4] */
        unsigned int    icg_dis_rgmii_sys_pub : 1  ; /* [3] */
        unsigned int    icg_dis_rgmii_gsf_125 : 1  ; /* [2] */
        unsigned int    icg_dis_rgmii_crg_125 : 1  ; /* [1] */
        unsigned int    icg_dis_rgmii_rx      : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_RGMII_CLK_DIS;

/* Define the union U_SC_USB_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_30               : 28  ; /* [31:4] */
        unsigned int    icg_en_usb_bus_early : 1  ; /* [3] */
        unsigned int    icg_en_usb_suspend   : 1  ; /* [2] */
        unsigned int    icg_en_usb_pipe3p    : 1  ; /* [1] */
        unsigned int    icg_en_usb_utmi      : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB_CLK_EN;

/* Define the union U_SC_USB_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_31                : 28  ; /* [31:4] */
        unsigned int    icg_dis_usb_bus_early : 1  ; /* [3] */
        unsigned int    icg_dis_usb_suspend   : 1  ; /* [2] */
        unsigned int    icg_dis_usb_pipe3p    : 1  ; /* [1] */
        unsigned int    icg_dis_usb_utmi      : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB_CLK_DIS;

/* Define the union U_SC_SYC_COUNTER_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_32             : 31  ; /* [31:1] */
        unsigned int    icg_en_sys_counter : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SYC_COUNTER_CLK_EN;

/* Define the union U_SC_SYS_COUNTER_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_33              : 31  ; /* [31:1] */
        unsigned int    icg_dis_sys_counter : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SYS_COUNTER_CLK_DIS;

/* Define the union U_SC_DDR_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_34     : 24  ; /* [31:8] */
        unsigned int    rsv_35     : 4  ; /* [7:4] */
        unsigned int    icg_en_ddr : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDR_CLK_EN;

/* Define the union U_SC_DDR_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_36      : 24  ; /* [31:8] */
        unsigned int    rsv_37      : 4  ; /* [7:4] */
        unsigned int    icg_dis_ddr : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDR_CLK_DIS;

/* Define the union U_SC_HHA_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_38      : 30  ; /* [31:2] */
        unsigned int    icg_en_hha1 : 1  ; /* [1] */
        unsigned int    rsv_39      : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_HHA_CLK_EN;

/* Define the union U_SC_HHA_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_40       : 30  ; /* [31:2] */
        unsigned int    icg_dis_hha1 : 1  ; /* [1] */
        unsigned int    rsv_41       : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_HHA_CLK_DIS;

/* Define the union U_SC_MN_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_42     : 30  ; /* [31:2] */
        unsigned int    icg_en_mn1 : 1  ; /* [1] */
        unsigned int    rsv_43     : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MN_CLK_EN;

/* Define the union U_SC_MN_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_44      : 30  ; /* [31:2] */
        unsigned int    icg_dis_mn1 : 1  ; /* [1] */
        unsigned int    rsv_45      : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MN_CLK_DIS;

/* Define the union U_SC_DDR_EXMBITST_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_46              : 30  ; /* [31:2] */
        unsigned int    icg_en_exmbist_cfg  : 1  ; /* [1] */
        unsigned int    icg_en_exmbist_aclk : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDR_EXMBITST_CLK_EN;

/* Define the union U_SC_DDR_EXMBITST_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_47               : 30  ; /* [31:2] */
        unsigned int    icg_dis_exmbist_cfg  : 1  ; /* [1] */
        unsigned int    icg_dis_exmbist_aclk : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDR_EXMBITST_CLK_DIS;

/* Define the union U_SC_DDR_APB_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_48         : 26  ; /* [31:6] */
        unsigned int    rsv_49         : 1  ; /* [5] */
        unsigned int    icg_en_dum_apb : 1  ; /* [4] */
        unsigned int    rsv_50         : 1  ; /* [3] */
        unsigned int    icg_en_p2p_m   : 1  ; /* [2] */
        unsigned int    rsv_51         : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDR_APB_CLK_EN;

/* Define the union U_SC_DDR_APB_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_52          : 26  ; /* [31:6] */
        unsigned int    rsv_53          : 1  ; /* [5] */
        unsigned int    icg_dis_dum_apb : 1  ; /* [4] */
        unsigned int    rsv_54          : 1  ; /* [3] */
        unsigned int    icg_dis_p2p_m   : 1  ; /* [2] */
        unsigned int    rsv_55          : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDR_APB_CLK_DIS;

/* Define the union U_SC_PROBE_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_56       : 31  ; /* [31:1] */
        unsigned int    icg_en_probe : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PROBE_CLK_EN;

/* Define the union U_SC_PROBE_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_57        : 31  ; /* [31:1] */
        unsigned int    icg_dis_probe : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PROBE_CLK_DIS;

/* Define the union U_SC_LLC_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_58     : 31  ; /* [31:1] */
        unsigned int    icg_en_llc : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_LLC_CLK_EN;

/* Define the union U_SC_LLC_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_59      : 31  ; /* [31:1] */
        unsigned int    icg_dis_llc : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_LLC_CLK_DIS;

/* Define the union U_SC_L2BUFF_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_60         : 31  ; /* [31:1] */
        unsigned int    icg_en_l2buff1 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_L2BUFF_CLK_EN;

/* Define the union U_SC_L2BUFF_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_61          : 31  ; /* [31:1] */
        unsigned int    icg_dis_l2buff1 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_L2BUFF_CLK_DIS;

/* Define the union U_SC_PCIE_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_62              : 23  ; /* [31:9] */
        unsigned int    icg_en_pipe         : 4  ; /* [8:5] */
        unsigned int    icg_en_phy_jtag_tck : 1  ; /* [4] */
        unsigned int    icg_en_phy_cr_para  : 1  ; /* [3] */
        unsigned int    rsv_63              : 1  ; /* [2] */
        unsigned int    rsv_64              : 1  ; /* [1] */
        unsigned int    rsv_65              : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PCIE_CLK_EN;

/* Define the union U_SC_PCIE_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_66               : 23  ; /* [31:9] */
        unsigned int    icg_dis_pipe         : 4  ; /* [8:5] */
        unsigned int    icg_dis_phy_jtag_tck : 1  ; /* [4] */
        unsigned int    icg_dis_phy_cr_para  : 1  ; /* [3] */
        unsigned int    rsv_67               : 1  ; /* [2] */
        unsigned int    rsv_68               : 1  ; /* [1] */
        unsigned int    rsv_69               : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PCIE_CLK_DIS;

/* Define the union U_SC_I2C_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_70     : 31  ; /* [31:1] */
        unsigned int    icg_en_i2c : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_I2C_CLK_EN;

/* Define the union U_SC_I2C_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_71      : 31  ; /* [31:1] */
        unsigned int    icg_dis_i2c : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_I2C_CLK_DIS;

/* Define the union U_SC_TIMER_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_72       : 31  ; /* [31:1] */
        unsigned int    icg_en_timer : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_TIMER_CLK_EN;

/* Define the union U_SC_TIMER_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_73        : 31  ; /* [31:1] */
        unsigned int    icg_dis_timer : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_TIMER_CLK_DIS;

/* Define the union U_SC_GPIO_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_74      : 30  ; /* [31:2] */
        unsigned int    icg_en_gpio : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_GPIO_CLK_EN;

/* Define the union U_SC_GPIO_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_75       : 30  ; /* [31:2] */
        unsigned int    icg_dis_gpio : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_GPIO_CLK_DIS;

/* Define the union U_SC_SFC_BUS_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_76         : 31  ; /* [31:1] */
        unsigned int    icg_en_sfc_bus : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SFC_BUS_CLK_EN;

/* Define the union U_SC_SFC_BUS_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_77          : 31  ; /* [31:1] */
        unsigned int    icg_dis_sfc_bus : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SFC_BUS_CLK_DIS;

/* Define the union U_SC_REF_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_78     : 31  ; /* [31:1] */
        unsigned int    icg_en_ref : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_REF_CLK_EN;

/* Define the union U_SC_REF_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_79      : 31  ; /* [31:1] */
        unsigned int    icg_dis_ref : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_REF_CLK_DIS;

/* Define the union U_SC_GPIO_DB_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_80         : 31  ; /* [31:1] */
        unsigned int    icg_en_gpio_db : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_GPIO_DB_CLK_EN;

/* Define the union U_SC_GPIO_DB_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_81          : 31  ; /* [31:1] */
        unsigned int    icg_dis_gpio_db : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_GPIO_DB_CLK_DIS;

/* Define the union U_SC_DJTAG_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_82       : 31  ; /* [31:1] */
        unsigned int    icg_en_djtag : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_CLK_EN;

/* Define the union U_SC_DJTAG_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_83        : 31  ; /* [31:1] */
        unsigned int    icg_dis_djtag : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_CLK_DIS;

/* Define the union U_SC_FUNC_MBIST_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_84            : 31  ; /* [31:1] */
        unsigned int    icg_en_func_mbist : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_FUNC_MBIST_CLK_EN;

/* Define the union U_SC_FUNC_MBIST_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_85             : 31  ; /* [31:1] */
        unsigned int    icg_dis_func_mbist : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_FUNC_MBIST_CLK_DIS;

/* Define the union U_SC_HPM_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_86     : 31  ; /* [31:1] */
        unsigned int    icg_en_hpm : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_HPM_CLK_EN;

/* Define the union U_SC_HPM_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_87      : 31  ; /* [31:1] */
        unsigned int    icg_dis_hpm : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_HPM_CLK_DIS;

/* Define the union U_SC_ULTRASOC_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_88          : 30  ; /* [31:2] */
        unsigned int    icg_en_ultrasoc : 1  ; /* [1] */
        unsigned int    icg_en_chie_mon : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ULTRASOC_CLK_EN;

/* Define the union U_SC_ULTRASOC_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_89           : 30  ; /* [31:2] */
        unsigned int    icg_dis_ultrasoc : 1  ; /* [1] */
        unsigned int    icg_dis_chie_mon : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ULTRASOC_CLK_DIS;

/* Define the union U_SC_SPMI_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_90      : 31  ; /* [31:1] */
        unsigned int    icg_en_spmi : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SPMI_CLK_EN;

/* Define the union U_SC_SPMI_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_91       : 31  ; /* [31:1] */
        unsigned int    icg_dis_spmi : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SPMI_CLK_DIS;

/* Define the union U_SC_PWM_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_92        : 31  ; /* [31:1] */
        unsigned int    icg_en_pwm_8k : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PWM_CLK_EN;

/* Define the union U_SC_PWM_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_93         : 31  ; /* [31:1] */
        unsigned int    icg_dis_pwm_8k : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PWM_CLK_DIS;

/* Define the union U_SC_TIMERSTAMP_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_94           : 31  ; /* [31:1] */
        unsigned int    icg_en_timestamp : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_TIMERSTAMP_CLK_EN;

/* Define the union U_SC_TIMESTAMP_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_95            : 31  ; /* [31:1] */
        unsigned int    icg_dis_timestamp : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_TIMESTAMP_CLK_DIS;

/* Define the union U_SC_L2BUFF_MBIST_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_96               : 30  ; /* [31:2] */
        unsigned int    icg_en_mbist_l2buff1 : 1  ; /* [1] */
        unsigned int    icg_en_mbist_l2buff0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_L2BUFF_MBIST_CLK_EN;

/* Define the union U_SC_L2BUFF_MBIST_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_97                : 30  ; /* [31:2] */
        unsigned int    icg_dis_mbist_l2buff1 : 1  ; /* [1] */
        unsigned int    icg_dis_mbist_l2buff0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_L2BUFF_MBIST_CLK_DIS;

/* Define the union U_SC_SRC_AI_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_98         : 30  ; /* [31:2] */
        unsigned int    icg_en_src_ai1 : 1  ; /* [1] */
        unsigned int    icg_en_src_ai0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SRC_AI_CLK_EN;

/* Define the union U_SC_SRC_AI_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_99          : 30  ; /* [31:2] */
        unsigned int    icg_dis_src_ai1 : 1  ; /* [1] */
        unsigned int    icg_dis_src_ai0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SRC_AI_CLK_DIS;

/* Define the union U_SC_GIC_CPU_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_100             : 31  ; /* [31:1] */
        unsigned int    icg_en_gic_cpu_asyn : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_GIC_CPU_CLK_EN;

/* Define the union U_SC_GIC_CPU_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_101              : 31  ; /* [31:1] */
        unsigned int    icg_dis_gic_cpu_asyn : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_GIC_CPU_CLK_DIS;

/* Define the union U_SC_CRS_CLK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_102         : 31  ; /* [31:1] */
        unsigned int    icg_en_crs_asyn : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CRS_CLK_EN;

/* Define the union U_SC_CRS_CLK_DIS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_103          : 31  ; /* [31:1] */
        unsigned int    icg_dis_crs_asyn : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CRS_CLK_DIS;

/* Define the union U_SC_SDMAM_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_104       : 31  ; /* [31:1] */
        unsigned int    srst_req_sdma : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SDMAM_RESET_REQ;

/* Define the union U_SC_SDMA_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_105        : 31  ; /* [31:1] */
        unsigned int    srst_dreq_sdma : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SDMA_RESET_DREQ;

/* Define the union U_SC_FTE_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_106      : 31  ; /* [31:1] */
        unsigned int    srst_req_fte : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_FTE_RESET_REQ;

/* Define the union U_SC_FTE_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_107       : 31  ; /* [31:1] */
        unsigned int    srst_dreq_fte : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_FTE_RESET_DREQ;

/* Define the union U_SC_USB_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_108               : 28  ; /* [31:4] */
        unsigned int    srst_req_usbphy_port  : 1  ; /* [3] */
        unsigned int    srst_req_usb_vcc      : 1  ; /* [2] */
        unsigned int    srst_req_usbphy_pipe0 : 1  ; /* [1] */
        unsigned int    srst_req_usbphy       : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB_RESET_REQ;

/* Define the union U_SC_USB_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_109                : 28  ; /* [31:4] */
        unsigned int    srst_dreq_usbphy_port  : 1  ; /* [3] */
        unsigned int    srst_dreq_usb_vcc      : 1  ; /* [2] */
        unsigned int    srst_dreq_usbphy_pipe0 : 1  ; /* [1] */
        unsigned int    srst_dreq_usbphy       : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB_RESET_DREQ;

/* Define the union U_SC_MII_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_110               : 30  ; /* [31:2] */
        unsigned int    srst_req_rgmii_gsf    : 1  ; /* [1] */
        unsigned int    srst_req_rgmii_mac_if : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MII_RESET_REQ;

/* Define the union U_SC_MII_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_111                : 30  ; /* [31:2] */
        unsigned int    srst_dreq_rgmii_gsf    : 1  ; /* [1] */
        unsigned int    srst_dreq_rgmii_mac_if : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MII_RESET_DREQ;

/* Define the union U_SC_SYS_COUNTERM_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_112              : 31  ; /* [31:1] */
        unsigned int    srst_req_sys_counter : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SYS_COUNTERM_RESET_REQ;

/* Define the union U_SC_SYS_COUNTER_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_113               : 31  ; /* [31:1] */
        unsigned int    srst_dreq_sys_counter : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SYS_COUNTER_RESET_DREQ;

/* Define the union U_SC_DDRC_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_114       : 24  ; /* [31:8] */
        unsigned int    rsv_115       : 4  ; /* [7:4] */
        unsigned int    srst_req_ddrc : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDRC_RESET_REQ;

/* Define the union U_SC_DDRC_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_116        : 24  ; /* [31:8] */
        unsigned int    rsv_117        : 4  ; /* [7:4] */
        unsigned int    srst_dreq_ddrc : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDRC_RESET_DREQ;

/* Define the union U_SC_HHA_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_118       : 30  ; /* [31:2] */
        unsigned int    srst_req_hha1 : 1  ; /* [1] */
        unsigned int    rsv_119       : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_HHA_RESET_REQ;

/* Define the union U_SC_HHA_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_120        : 30  ; /* [31:2] */
        unsigned int    srst_dreq_hha1 : 1  ; /* [1] */
        unsigned int    rsv_121        : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_HHA_RESET_DREQ;

/* Define the union U_SC_MN_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_122      : 30  ; /* [31:2] */
        unsigned int    srst_req_mn1 : 1  ; /* [1] */
        unsigned int    rsv_123      : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MN_RESET_REQ;

/* Define the union U_SC_MN_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_124       : 30  ; /* [31:2] */
        unsigned int    srst_dreq_mn1 : 1  ; /* [1] */
        unsigned int    rsv_125       : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MN_RESET_DREQ;

/* Define the union U_SC_DDRC_EXMBIST_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_126                 : 30  ; /* [31:2] */
        unsigned int    srst_req_exmbist_areset : 1  ; /* [1] */
        unsigned int    srst_req_exmbist        : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDRC_EXMBIST_RESET_REQ;

/* Define the union U_SC_DDRC_EXMBIST_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_127                  : 30  ; /* [31:2] */
        unsigned int    srst_dreq_exmbist_areset : 1  ; /* [1] */
        unsigned int    srst_dreq_exmbist        : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDRC_EXMBIST_RESET_DREQ;

/* Define the union U_SC_DDRC_PACK_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_128        : 24  ; /* [31:8] */
        unsigned int    rsv_129        : 3  ; /* [7:5] */
        unsigned int    srst_req_dum   : 1  ; /* [4] */
        unsigned int    rsv_130        : 1  ; /* [3] */
        unsigned int    srst_req_p2p_m : 1  ; /* [2] */
        unsigned int    rsv_131        : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDRC_PACK_RESET_REQ;

/* Define the union U_SC_DDRC_PACK_REGS_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_132         : 24  ; /* [31:8] */
        unsigned int    rsv_133         : 3  ; /* [7:5] */
        unsigned int    srst_dreq_dum   : 1  ; /* [4] */
        unsigned int    rsv_134         : 1  ; /* [3] */
        unsigned int    srst_dreq_p2p_m : 1  ; /* [2] */
        unsigned int    rsv_135         : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDRC_PACK_REGS_RESET_DREQ;

/* Define the union U_SC_LLC_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_136      : 31  ; /* [31:1] */
        unsigned int    srst_req_llc : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_LLC_RESET_REQ;

/* Define the union U_SC_LLC__REGS_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_137       : 31  ; /* [31:1] */
        unsigned int    srst_dreq_llc : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_LLC__REGS_RESET_DREQ;

/* Define the union U_SC_L2BUFF_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_138          : 31  ; /* [31:1] */
        unsigned int    srst_req_l2buff1 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_L2BUFF_RESET_REQ;

/* Define the union U_SC_L2BUFF__REGS_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_139           : 31  ; /* [31:1] */
        unsigned int    srst_dreq_l2buff1 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_L2BUFF__REGS_RESET_DREQ;

/* Define the union U_SC_PCIE_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_140           : 28  ; /* [31:4] */
        unsigned int    srst_req_pcie_phy : 1  ; /* [3] */
        unsigned int    rsv_141           : 1  ; /* [2] */
        unsigned int    srst_req_por_pcie : 1  ; /* [1] */
        unsigned int    srst_req_pcie     : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PCIE_RESET_REQ;

/* Define the union U_SC_PCIE__REGS_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_142            : 28  ; /* [31:4] */
        unsigned int    srst_dreq_pcie_phy : 1  ; /* [3] */
        unsigned int    rsv_143            : 1  ; /* [2] */
        unsigned int    srst_dreq_por_pcie : 1  ; /* [1] */
        unsigned int    srst_dreq_pcie     : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PCIE__REGS_RESET_DREQ;

/* Define the union U_SC_I2C_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_144      : 31  ; /* [31:1] */
        unsigned int    srst_req_i2c : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_I2C_RESET_REQ;

/* Define the union U_SC_I2C__REGS_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_145       : 31  ; /* [31:1] */
        unsigned int    srst_dreq_i2c : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_I2C__REGS_RESET_DREQ;

/* Define the union U_SC_TIMER_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_146        : 31  ; /* [31:1] */
        unsigned int    srst_req_timer : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_TIMER_RESET_REQ;

/* Define the union U_SC_TIMER__REGS_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_147         : 31  ; /* [31:1] */
        unsigned int    srst_dreq_timer : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_TIMER__REGS_RESET_DREQ;

/* Define the union U_SC_GPIO_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_148       : 30  ; /* [31:2] */
        unsigned int    srst_req_gpio : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_GPIO_RESET_REQ;

/* Define the union U_SC_GPIO__REGS_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_149        : 30  ; /* [31:2] */
        unsigned int    srst_dreq_gpio : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_GPIO__REGS_RESET_DREQ;

/* Define the union U_SC_SPMI_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_150       : 31  ; /* [31:1] */
        unsigned int    srst_req_spmi : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SPMI_RESET_REQ;

/* Define the union U_SC_SPMI__REGS_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_151        : 31  ; /* [31:1] */
        unsigned int    srst_dreq_spmi : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SPMI__REGS_RESET_DREQ;

/* Define the union U_SC_USB_UTMI_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_152           : 31  ; /* [31:1] */
        unsigned int    srst_req_usb_utmi : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB_UTMI_RESET_REQ;

/* Define the union U_SC_USB_UTMI__REGS_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_153            : 31  ; /* [31:1] */
        unsigned int    srst_dreq_usb_utmi : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB_UTMI__REGS_RESET_DREQ;

/* Define the union U_SC_ULTRASOC_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_154           : 30  ; /* [31:2] */
        unsigned int    srst_req_ultrasoc : 1  ; /* [1] */
        unsigned int    srst_req_chie_mon : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ULTRASOC_RESET_REQ;

/* Define the union U_SC_ULTRASOC__REGS_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_155            : 30  ; /* [31:2] */
        unsigned int    srst_dreq_ultrasoc : 1  ; /* [1] */
        unsigned int    srst_dreq_chie_mon : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ULTRASOC__REGS_RESET_DREQ;

/* Define the union U_SC_CPM_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_156       : 30  ; /* [31:2] */
        unsigned int    srst_req_cpm1 : 1  ; /* [1] */
        unsigned int    srst_req_cpm0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CPM_RESET_REQ;

/* Define the union U_SC_CPM__REGS_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_157        : 30  ; /* [31:2] */
        unsigned int    srst_dreq_cpm1 : 1  ; /* [1] */
        unsigned int    srst_dreq_cpm0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CPM__REGS_RESET_DREQ;

/* Define the union U_SC_SVFD_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_158        : 30  ; /* [31:2] */
        unsigned int    srst_req_svfd1 : 1  ; /* [1] */
        unsigned int    srst_req_svfd0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SVFD_RESET_REQ;

/* Define the union U_SC_SVFD__REGS_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_159         : 30  ; /* [31:2] */
        unsigned int    srst_dreq_svfd1 : 1  ; /* [1] */
        unsigned int    srst_dreq_svfd0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SVFD__REGS_RESET_DREQ;

/* Define the union U_SC_BISR_S_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_160         : 31  ; /* [31:1] */
        unsigned int    srst_req_bisr_s : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BISR_S_RESET_REQ;

/* Define the union U_SC_BISR_S_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_161          : 31  ; /* [31:1] */
        unsigned int    srst_dreq_bisr_s : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BISR_S_RESET_DREQ;

/* Define the union U_SC_PWM_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_162         : 31  ; /* [31:1] */
        unsigned int    srst_req_pwm_8k : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PWM_RESET_REQ;

/* Define the union U_SC_PWM_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_163          : 31  ; /* [31:1] */
        unsigned int    srst_dreq_pwm_8k : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PWM_RESET_DREQ;

/* Define the union U_SC_BISR_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_164       : 31  ; /* [31:1] */
        unsigned int    srst_req_bisr : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BISR_RESET_REQ;

/* Define the union U_SC_BISR_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_165        : 31  ; /* [31:1] */
        unsigned int    srst_dreq_bisr : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BISR_RESET_DREQ;

/* Define the union U_SC_STATUS_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_166         : 31  ; /* [31:1] */
        unsigned int    srst_req_status : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_STATUS_RESET_REQ;

/* Define the union U_SC_STATUS_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_167          : 31  ; /* [31:1] */
        unsigned int    srst_dreq_status : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_STATUS_RESET_DREQ;

/* Define the union U_SC_AICORE0_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_168              : 29  ; /* [31:3] */
        unsigned int    rsv_169              : 1  ; /* [2] */
        unsigned int    srst_req_por_aicore0 : 1  ; /* [1] */
        unsigned int    srst_req_aicore0     : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AICORE0_RESET_REQ;

/* Define the union U_SC_AICORE0_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_170               : 29  ; /* [31:3] */
        unsigned int    rsv_171               : 1  ; /* [2] */
        unsigned int    srst_dreq_por_aicore0 : 1  ; /* [1] */
        unsigned int    srst_dreq_aicore0     : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AICORE0_RESET_DREQ;

/* Define the union U_SC_AICORE1_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_172              : 29  ; /* [31:3] */
        unsigned int    rsv_173              : 1  ; /* [2] */
        unsigned int    srst_req_por_aicore1 : 1  ; /* [1] */
        unsigned int    srst_req_aicore1     : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AICORE1_RESET_REQ;

/* Define the union U_SC_AICORE1_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_174               : 29  ; /* [31:3] */
        unsigned int    rsv_175               : 1  ; /* [2] */
        unsigned int    srst_dreq_por_aicore1 : 1  ; /* [1] */
        unsigned int    srst_dreq_aicore1     : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AICORE1_RESET_DREQ;

/* Define the union U_SC_CPU_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_176          : 29  ; /* [31:3] */
        unsigned int    rsv_177          : 1  ; /* [2] */
        unsigned int    srst_req_por_cpu : 1  ; /* [1] */
        unsigned int    srst_req_cpu     : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CPU_RESET_REQ;

/* Define the union U_SC_CPU_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_178           : 29  ; /* [31:3] */
        unsigned int    rsv_179           : 1  ; /* [2] */
        unsigned int    srst_dreq_por_cpu : 1  ; /* [1] */
        unsigned int    srst_dreq_cpu     : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CPU_RESET_DREQ;

/* Define the union U_SC_SFC_BUS_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_180          : 31  ; /* [31:1] */
        unsigned int    srst_req_sfc_bus : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SFC_BUS_RESET_REQ;

/* Define the union U_SC_SFC_BUS_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_181           : 31  ; /* [31:1] */
        unsigned int    srst_dreq_sfc_bus : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SFC_BUS_RESET_DREQ;

/* Define the union U_SC_STAMP_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_182            : 31  ; /* [31:1] */
        unsigned int    srst_req_timestamp : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_STAMP_RESET_REQ;

/* Define the union U_SC_STAMP_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_183             : 31  ; /* [31:1] */
        unsigned int    srst_dreq_timestamp : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_STAMP_RESET_DREQ;

/* Define the union U_SC_AICORE0_POWER_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_184                : 31  ; /* [31:1] */
        unsigned int    srst_req_power_aicore0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AICORE0_POWER_RESET_REQ;

/* Define the union U_SC_AICORE0_POWER_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_185                 : 31  ; /* [31:1] */
        unsigned int    srst_dreq_power_aicore0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AICORE0_POWER_RESET_DREQ;

/* Define the union U_SC_AICORE1_POWER_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_186                : 31  ; /* [31:1] */
        unsigned int    srst_req_power_aicore1 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AICORE1_POWER_RESET_REQ;

/* Define the union U_SC_AICORE1_POWER_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_187                 : 31  ; /* [31:1] */
        unsigned int    srst_dreq_power_aicore1 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AICORE1_POWER_RESET_DREQ;

/* Define the union U_SC_CPU_POWER_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_188            : 31  ; /* [31:1] */
        unsigned int    srst_req_power_cpu : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CPU_POWER_RESET_REQ;

/* Define the union U_SC_CPU_POWER_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_189             : 31  ; /* [31:1] */
        unsigned int    srst_dreq_power_cpu : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CPU_POWER_RESET_DREQ;

/* Define the union U_SC_DJTAG_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_190        : 31  ; /* [31:1] */
        unsigned int    srst_req_djtag : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_RESET_REQ;

/* Define the union U_SC_DJTAG_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_191         : 31  ; /* [31:1] */
        unsigned int    srst_dreq_djtag : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_RESET_DREQ;

/* Define the union U_SC_FUNC_MBIST_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_192             : 31  ; /* [31:1] */
        unsigned int    srst_req_func_mbist : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_FUNC_MBIST_RESET_REQ;

/* Define the union U_SC_FUNC_MBIST_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_193              : 31  ; /* [31:1] */
        unsigned int    srst_dreq_func_mbist : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_FUNC_MBIST_RESET_DREQ;

/* Define the union U_SC_HPM_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_194      : 31  ; /* [31:1] */
        unsigned int    srst_req_hpm : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_HPM_RESET_REQ;

/* Define the union U_SC_HPM_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_195       : 31  ; /* [31:1] */
        unsigned int    srst_dreq_hpm : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_HPM_RESET_DREQ;

/* Define the union U_SC_BISR_REPAIR_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_196              : 31  ; /* [31:1] */
        unsigned int    srst_req_bisr_repair : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BISR_REPAIR_RESET_REQ;

/* Define the union U_SC_BISR_REPAIR_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_197               : 31  ; /* [31:1] */
        unsigned int    srst_dreq_bisr_repair : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BISR_REPAIR_RESET_DREQ;

/* Define the union U_SC_PCIE_POWER_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_198             : 31  ; /* [31:1] */
        unsigned int    srst_req_power_pcie : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PCIE_POWER_RESET_REQ;

/* Define the union U_SC_PCIE_POWER_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_199              : 31  ; /* [31:1] */
        unsigned int    srst_dreq_power_pcie : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PCIE_POWER_RESET_DREQ;

/* Define the union U_SC_I2C_CTRL_SET */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_200               : 20  ; /* [31:12] */
        unsigned int    smbus_sda_cfg_set     : 1  ; /* [11] */
        unsigned int    smbus_dat_oe_cfg_set  : 1  ; /* [10] */
        unsigned int    smbus_dat_mux_sel_set : 1  ; /* [9] */
        unsigned int    smbus_scl_cfg_set     : 1  ; /* [8] */
        unsigned int    smbus_clk_oe_cfg_set  : 1  ; /* [7] */
        unsigned int    smbus_clk_mux_sel_set : 1  ; /* [6] */
        unsigned int    i2c0_sda_cfg_set      : 1  ; /* [5] */
        unsigned int    i2c0_dat_oe_cfg_set   : 1  ; /* [4] */
        unsigned int    i2c0_dat_mux_sel_set  : 1  ; /* [3] */
        unsigned int    i2c0_scl_cfg_set      : 1  ; /* [2] */
        unsigned int    i2c0_clk_oe_cfg_set   : 1  ; /* [1] */
        unsigned int    i2c0_clk_mux_sel_set  : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_I2C_CTRL_SET;

/* Define the union U_SC_I2C_CTRL_CLR */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_201               : 20  ; /* [31:12] */
        unsigned int    smbus_sda_cfg_clr     : 1  ; /* [11] */
        unsigned int    smbus_dat_oe_cfg_clr  : 1  ; /* [10] */
        unsigned int    smbus_dat_mux_sel_clr : 1  ; /* [9] */
        unsigned int    smbus_scl_cfg_clr     : 1  ; /* [8] */
        unsigned int    smbus_clk_oe_cfg_clr  : 1  ; /* [7] */
        unsigned int    smbus_clk_mux_sel_clr : 1  ; /* [6] */
        unsigned int    i2c0_sda_cfg_clr      : 1  ; /* [5] */
        unsigned int    i2c0_dat_oe_cfg_clr   : 1  ; /* [4] */
        unsigned int    i2c0_dat_mux_sel_clr  : 1  ; /* [3] */
        unsigned int    i2c0_scl_cfg_clr      : 1  ; /* [2] */
        unsigned int    i2c0_clk_oe_cfg_clr   : 1  ; /* [1] */
        unsigned int    i2c0_clk_mux_sel_clr  : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_I2C_CTRL_CLR;

/* Define the union U_SC_DDR_RETENTION */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_202          : 31  ; /* [31:1] */
        unsigned int    sc_ddr_retention : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDR_RETENTION;

/* Define the union U_SC_DDR_RESET_ACK_CTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_203                : 24  ; /* [31:8] */
        unsigned int    sc_warm_rst_ack_en_ddr : 8  ; /* [7:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDR_RESET_ACK_CTRL;

/* Define the union U_SC_ARM_JTAG_SEL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_204      : 29  ; /* [31:3] */
        unsigned int    arm_jtag_sel : 3  ; /* [2:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ARM_JTAG_SEL;

/* Define the union U_SC_DBGACK_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_205   : 31  ; /* [31:1] */
        unsigned int    dbgack_en : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DBGACK_EN;

/* Define the union U_SC_DISPATCH_ERRRSP */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_206        : 31  ; /* [31:1] */
        unsigned int    errrsp_disable : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DISPATCH_ERRRSP;

/* Define the union U_SC_SCH_S3_USER_CTRL0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_aruser_31_0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SCH_S3_USER_CTRL0;

/* Define the union U_SC_SCH_S3_USER_CTRL1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sch_s3_aruser_63_32 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SCH_S3_USER_CTRL1;

/* Define the union U_SC_SCH_S3_USER_CTRL2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_207             : 16  ; /* [31:16] */
        unsigned int    sch_s3_wuser        : 4  ; /* [15:12] */
        unsigned int    sch_s3_awqos        : 4  ; /* [11:8] */
        unsigned int    sch_s3_arqos        : 4  ; /* [7:4] */
        unsigned int    sch_s3_aruser_67_64 : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SCH_S3_USER_CTRL2;

/* Define the union U_SC_SCH_S3_USER_CTRL3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_awuser_31_0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SCH_S3_USER_CTRL3;

/* Define the union U_SC_SCH_S3_USER_CTRL4 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sch_s3_awuser_63_32 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SCH_S3_USER_CTRL4;

/* Define the union U_SC_SCH_S3_USER_CTRL5 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_208             : 28  ; /* [31:4] */
        unsigned int    sch_s3_awuser_67_64 : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SCH_S3_USER_CTRL5;

/* Define the union U_SC_AO_RESET_CTRL_DDR */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_209            : 24  ; /* [31:8] */
        unsigned int    ao_reset_ctrl_ddr1 : 4  ; /* [7:4] */
        unsigned int    rsv_210            : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AO_RESET_CTRL_DDR;

/* Define the union U_SC_DDR_MODE_CTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_211        : 24  ; /* [31:8] */
        unsigned int    byp_mode_ddrc7 : 1  ; /* [7] */
        unsigned int    byp_mode_ddrc6 : 1  ; /* [6] */
        unsigned int    byp_mode_ddrc5 : 1  ; /* [5] */
        unsigned int    byp_mode_ddrc4 : 1  ; /* [4] */
        unsigned int    rsv_212        : 1  ; /* [3] */
        unsigned int    rsv_213        : 1  ; /* [2] */
        unsigned int    rsv_214        : 1  ; /* [1] */
        unsigned int    rsv_215        : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDR_MODE_CTRL;

/* Define the union U_SC_TIMER_CLK_SEL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_216       : 30  ; /* [31:2] */
        unsigned int    timer_clk_sel : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_TIMER_CLK_SEL;

/* Define the union U_SC_WDG_CLK_SEL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_217     : 30  ; /* [31:2] */
        unsigned int    wdg_clk_sel : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_WDG_CLK_SEL;

/* Define the union U_SC_SFC_CLK_SEL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_218     : 30  ; /* [31:2] */
        unsigned int    sfc_clk_sel : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SFC_CLK_SEL;

/* Define the union U_SC_TIMER_EN_EXTERNAL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_219              : 31  ; /* [31:1] */
        unsigned int    sc_timer_en_external : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_TIMER_EN_EXTERNAL;

/* Define the union U_SC_USB3_CTRL0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_220                : 28  ; /* [31:4] */
        unsigned int    usb3_bus_filter_bypass : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_CTRL0;

/* Define the union U_SC_USB3_CTRL1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_221              : 26  ; /* [31:6] */
        unsigned int    usb3_fladj_30mhz_reg : 6  ; /* [5:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_CTRL1;

/* Define the union U_SC_USB3_CTRL5 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_222          : 31  ; /* [31:1] */
        unsigned int    usb3_ref_clkdiv2 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_CTRL5;

/* Define the union U_SC_USB3_CTRL6 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_223                    : 12  ; /* [31:20] */
        unsigned int    pme_en                     : 1  ; /* [19] */
        unsigned int    gp_in                      : 16  ; /* [18:3] */
        unsigned int    sc_usb3_bigendian          : 1  ; /* [2] */
        unsigned int    sc_usb3_utmiotg_dmpulldown : 1  ; /* [1] */
        unsigned int    sc_usb3_utmiotg_dppulldown : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_CTRL6;

/* Define the union U_SC_USB3_RAM_ECC_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_224            : 31  ; /* [31:1] */
        unsigned int    sc_usb3_ram_ecc_en : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_RAM_ECC_EN;

/* Define the union U_SC_USB3_RAM_ECC_CLR */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_225             : 31  ; /* [31:1] */
        unsigned int    sc_usb3_ram_ecc_clr : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_RAM_ECC_CLR;

/* Define the union U_SC_UTMI_CLK_SEL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_226         : 31  ; /* [31:1] */
        unsigned int    sc_utmi_clk_sel : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_UTMI_CLK_SEL;

/* Define the union U_SC_M2_PAD_OE */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_227         : 30  ; /* [31:2] */
        unsigned int    m2_pewake_n_oen : 1  ; /* [1] */
        unsigned int    m2_clkreq_n_oen : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_M2_PAD_OE;

/* Define the union U_SC_JTAG_AUTH_CTRL0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_228            : 31  ; /* [31:1] */
        unsigned int    sc2ja_selftest_enb : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_JTAG_AUTH_CTRL0;

/* Define the union U_SC_JTAG_AUTH_CTRL1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    heart_beat_num : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_JTAG_AUTH_CTRL1;

/* Define the union U_SC_JTAG_AUTH_CTRL2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_229            : 31  ; /* [31:1] */
        unsigned int    sc2ja_emsa_pss_sel : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_JTAG_AUTH_CTRL2;

/* Define the union U_SC_CFG_BW_CTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_230               : 3  ; /* [31:29] */
        unsigned int    sc_overflow_cpu_mux   : 1  ; /* [28] */
        unsigned int    sc_cfg_bwc_en         : 1  ; /* [27] */
        unsigned int    sc_cfg_bwc_saturation : 14  ; /* [26:13] */
        unsigned int    sc_cfg_bwc_bandwidth  : 13  ; /* [12:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CFG_BW_CTRL;

/* Define the union U_SC_REPAIR_LOAD_RSTN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_231                       : 11  ; /* [31:21] */
        unsigned int    repair_load_rstn_dvpp         : 1  ; /* [20] */
        unsigned int    repair_load_rstn_pcie         : 1  ; /* [19] */
        unsigned int    repair_load_rstn_peri_llc_hha : 1  ; /* [18] */
        unsigned int    repair_load_rstn_pcie_io      : 1  ; /* [17] */
        unsigned int    repair_load_rstn_ddr0         : 1  ; /* [16] */
        unsigned int    repair_load_rstn_ddr1         : 1  ; /* [15] */
        unsigned int    repair_load_rstn_cpu_cluster  : 1  ; /* [14] */
        unsigned int    repair_load_rstn_ts           : 1  ; /* [13] */
        unsigned int    repair_load_rstn_dvpp_l2buf   : 1  ; /* [12] */
        unsigned int    repair_load_rstn_a55_0        : 1  ; /* [11] */
        unsigned int    repair_load_rstn_a55_1        : 1  ; /* [10] */
        unsigned int    repair_load_rstn_a55_2        : 1  ; /* [9] */
        unsigned int    repair_load_rstn_a55_3        : 1  ; /* [8] */
        unsigned int    repair_load_rstn_a55_4        : 1  ; /* [7] */
        unsigned int    repair_load_rstn_a55_5        : 1  ; /* [6] */
        unsigned int    repair_load_rstn_a55_6        : 1  ; /* [5] */
        unsigned int    repair_load_rstn_a55_7        : 1  ; /* [4] */
        unsigned int    repair_load_rstn_aic_0        : 1  ; /* [3] */
        unsigned int    repair_load_rstn_aic_1        : 1  ; /* [2] */
        unsigned int    repair_load_rstn_aic_2        : 1  ; /* [1] */
        unsigned int    repair_load_rstn_aic_3        : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_REPAIR_LOAD_RSTN;

/* Define the union U_SC_INT_WAKE_MASK */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_232        : 29  ; /* [31:3] */
        unsigned int    timer_int_mask : 1  ; /* [2] */
        unsigned int    pcie_int_mask  : 1  ; /* [1] */
        unsigned int    gpio_int_mask  : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_INT_WAKE_MASK;

/* Define the union U_SC_USB3_PHY_CFG0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_233                        : 3  ; /* [31:29] */
        unsigned int    sc_usb3_phy_txrisetune0        : 2  ; /* [28:27] */
        unsigned int    sc_usb3_phy_txrestune0         : 2  ; /* [26:25] */
        unsigned int    sc_usb3_phy_txpreemppulsetune0 : 1  ; /* [24] */
        unsigned int    sc_usb3_phy_txpreempamptune0   : 2  ; /* [23:22] */
        unsigned int    sc_usb3_phy_txhsxvtune0        : 2  ; /* [21:20] */
        unsigned int    sc_usb3_phy_txfslstune0        : 4  ; /* [19:16] */
        unsigned int    sc_usb3_phy_sqrxtune0          : 3  ; /* [15:13] */
        unsigned int    sc_usb3_phy_refclksel          : 2  ; /* [12:11] */
        unsigned int    sc_usb3_phy_otgtune0           : 3  ; /* [10:8] */
        unsigned int    sc_usb3_phy_otgdisable0        : 1  ; /* [7] */
        unsigned int    sc_usb3_phy_loopbackenb0       : 1  ; /* [6] */
        unsigned int    sc_usb3_phy_idpullup0          : 1  ; /* [5] */
        unsigned int    sc_usb3_phy_drvvbus0           : 1  ; /* [4] */
        unsigned int    sc_usb3_phy_compdistune0       : 3  ; /* [3:1] */
        unsigned int    sc_usb3_phy_commononn          : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_PHY_CFG0;

/* Define the union U_SC_USB3_PHY_CFG1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_234                         : 7  ; /* [31:25] */
        unsigned int    sc_usb3_phy_iddig0              : 1  ; /* [24] */
        unsigned int    sc_usb3_phy_fsel                : 6  ; /* [23:18] */
        unsigned int    sc_usb3_phy_tx_vboost_lvl       : 3  ; /* [17:15] */
        unsigned int    sc_usb3_phy_teste_powerdown_ssp : 1  ; /* [14] */
        unsigned int    sc_usb3_phy_teste_powerdown_hsp : 1  ; /* [13] */
        unsigned int    sc_usb3_phy_teste_burnin        : 1  ; /* [12] */
        unsigned int    sc_usb3_phy_ref_use_pad         : 1  ; /* [11] */
        unsigned int    sc_usb3_phy_ref_ssp_en          : 1  ; /* [10] */
        unsigned int    sc_usb3_phy_vdatsrcenb0         : 1  ; /* [9] */
        unsigned int    sc_usb3_phy_vdatdetenb0         : 1  ; /* [8] */
        unsigned int    sc_usb3_phy_vdatreftune0        : 2  ; /* [7:6] */
        unsigned int    sc_usb3_phy_vbusvldextsel0      : 1  ; /* [5] */
        unsigned int    sc_usb3_phy_vbusvldext0         : 1  ; /* [4] */
        unsigned int    sc_usb3_phy_txvreftune0         : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_PHY_CFG1;

/* Define the union U_SC_USB3_PHY_CFG2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_235                 : 12  ; /* [31:20] */
        unsigned int    sc_usb3_phy_cr_data_in  : 16  ; /* [19:4] */
        unsigned int    sc_usb3_phy_cr_write    : 1  ; /* [3] */
        unsigned int    sc_usb3_phy_cr_read     : 1  ; /* [2] */
        unsigned int    sc_usb3_phy_cr_cap_dat  : 1  ; /* [1] */
        unsigned int    sc_usb3_phy_cr_cap_addr : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_PHY_CFG2;

/* Define the union U_SC_USB3_PHY_CFG3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_236                 : 15  ; /* [31:17] */
        unsigned int    sc_usb3_phy_cr_data_out : 16  ; /* [16:1] */
        unsigned int    sc_usb3_phy_cr_ack      : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_PHY_CFG3;

/* Define the union U_SC_USB3_PHY_CFG4 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_237                          : 25  ; /* [31:7] */
        unsigned int    sc_usb3_phy_lane0_tx_term_offset : 5  ; /* [6:2] */
        unsigned int    sc_usb3_phy_lane0_tx2rx_loopbk   : 1  ; /* [1] */
        unsigned int    sc_usb3_phy_clane0_ext_pclk_req  : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_PHY_CFG4;

/* Define the union U_SC_USB3_PHY_CFG5 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_238               : 24  ; /* [31:8] */
        unsigned int    sc_usb3_phy_los_level : 5  ; /* [7:3] */
        unsigned int    sc_usb3_phy_los_bias  : 3  ; /* [2:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_PHY_CFG5;

/* Define the union U_SC_USB3_PHY_CFG6 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_239                        : 24  ; /* [31:8] */
        unsigned int    sc_usb3_phy_mpll_multiplier    : 7  ; /* [7:1] */
        unsigned int    sc_usb3_phy_mpll_refssc_clk_en : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_PHY_CFG6;

/* Define the union U_SC_USB3_PHY_CFG7 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_240                         : 3  ; /* [31:29] */
        unsigned int    sc_usb3_phy_pcs_tx_full         : 7  ; /* [28:22] */
        unsigned int    sc_usb3_phy_pcs_tx_deemph_6db   : 6  ; /* [21:16] */
        unsigned int    sc_usb3_phy_pcs_tx_deemph_3p5db : 6  ; /* [15:10] */
        unsigned int    sc_usb3_phy_pcs_rx_los_mask_val : 10  ; /* [9:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_PHY_CFG7;

/* Define the union U_SC_USB3_PHY_CFG8 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_241               : 30  ; /* [31:2] */
        unsigned int    sc_usb3_phy_rtune_ack : 1  ; /* [1] */
        unsigned int    sc_usb3_phy_rtune_req : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_PHY_CFG8;

/* Define the union U_SC_USB3_PHY_CFG9 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_242                     : 17  ; /* [31:15] */
        unsigned int    sc_usb3_phy_rx0loslfpsen    : 1  ; /* [14] */
        unsigned int    sc_usb3_phy_retenablen      : 1  ; /* [13] */
        unsigned int    sc_usb3_phy_ssc_ref_clk_sel : 9  ; /* [12:4] */
        unsigned int    sc_usb3_phy_ssc_range       : 3  ; /* [3:1] */
        unsigned int    sc_usb3_phy_ssc_en          : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_PHY_CFG9;

/* Define the union U_SC_USB3_PHY_CFG10 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_243      : 26  ; /* [31:6] */
        unsigned int    bypassdpdata : 1  ; /* [5] */
        unsigned int    bypassdmdata : 1  ; /* [4] */
        unsigned int    bypassdpen   : 1  ; /* [3] */
        unsigned int    bypassdmen   : 1  ; /* [2] */
        unsigned int    bypasssel    : 1  ; /* [1] */
        unsigned int    autorsmenb   : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_PHY_CFG10;

/* Define the union U_SC_USB3_PHY_CFG11 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_244           : 19  ; /* [31:13] */
        unsigned int    vatestenb         : 1  ; /* [12] */
        unsigned int    rsv_245           : 1  ; /* [11] */
        unsigned int    alt_clk_en        : 1  ; /* [10] */
        unsigned int    alt_clk_sel       : 1  ; /* [9] */
        unsigned int    alt_pcs_clk       : 1  ; /* [8] */
        unsigned int    alt_pipe_clk      : 1  ; /* [7] */
        unsigned int    ref_repeat_clk_en : 1  ; /* [6] */
        unsigned int    ref_use_xo        : 1  ; /* [5] */
        unsigned int    ref_xo_en         : 1  ; /* [4] */
        unsigned int    dcdenb            : 1  ; /* [3] */
        unsigned int    chrgsel           : 1  ; /* [2] */
        unsigned int    chrgsrcpuenb      : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_PHY_CFG11;

/* Define the union U_SC_USB3_PHY_CFG12 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_246        : 25  ; /* [31:7] */
        unsigned int    txbitstuffen0  : 1  ; /* [6] */
        unsigned int    txbitstuffenh0 : 1  ; /* [5] */
        unsigned int    hsxcvrextctl   : 1  ; /* [4] */
        unsigned int    fsdataext      : 1  ; /* [3] */
        unsigned int    fsse0ext       : 1  ; /* [2] */
        unsigned int    fsxcvrowner    : 1  ; /* [1] */
        unsigned int    txenablen      : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_PHY_CFG12;

/* Define the union U_SC_PMURST_CTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_247             : 30  ; /* [31:2] */
        unsigned int    sc_io_rst_out_n_oen : 1  ; /* [1] */
        unsigned int    sc_pmurst_ctrl      : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PMURST_CTRL;

/* Define the union U_SC_RST_CTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_248            : 27  ; /* [31:5] */
        unsigned int    sc_pcie_rst_bypass : 1  ; /* [4] */
        unsigned int    sc_devrst_ctrl     : 1  ; /* [3] */
        unsigned int    sc_rst_dram_ctrl   : 2  ; /* [2:1] */
        unsigned int    soft_rst_dram_dis  : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_RST_CTRL;

/* Define the union U_SC_WAIT_DDR_SELFREFLASH_BYPASS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_249                             : 31  ; /* [31:1] */
        unsigned int    sc_wait_ddr_selfreflash_doneb_ypass : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_WAIT_DDR_SELFREFLASH_BYPASS;

/* Define the union U_SC_MEM_CTRL_SP_SRAM */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_250          : 25  ; /* [31:7] */
        unsigned int    sp_ram_tmod_sram : 7  ; /* [6:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MEM_CTRL_SP_SRAM;

/* Define the union U_SC_MEM_CTRL_RGMII */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_251                 : 4  ; /* [31:28] */
        unsigned int    rgmii_ecc_bypass        : 1  ; /* [27] */
        unsigned int    rgmii_tp_ram_tmod       : 8  ; /* [26:19] */
        unsigned int    rgmii_sp_ram_tmod       : 7  ; /* [18:12] */
        unsigned int    rgmii_tp_ram_power_mode : 6  ; /* [11:6] */
        unsigned int    rgmii_sp_ram_power_mode : 6  ; /* [5:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MEM_CTRL_RGMII;

/* Define the union U_SC_MEM_CTRL_SMMU */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_252             : 19  ; /* [31:13] */
        unsigned int    smmu_mem_power_mode : 6  ; /* [12:7] */
        unsigned int    smmu_sp_ram_tmod    : 7  ; /* [6:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MEM_CTRL_SMMU;

/* Define the union U_SC_MEM_CTRL0_USB3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_253             : 4  ; /* [31:28] */
        unsigned int    usb_ram3_ecc_bypass : 1  ; /* [27] */
        unsigned int    usb_ram2_ecc_bypass : 1  ; /* [26] */
        unsigned int    usb_ram1_ecc_bypass : 1  ; /* [25] */
        unsigned int    usb_ram0_ecc_bypass : 1  ; /* [24] */
        unsigned int    usb_tp_ram2_tmod    : 8  ; /* [23:16] */
        unsigned int    usb_tp_ram1_tmod    : 8  ; /* [15:8] */
        unsigned int    usb_tp_ram0_tmod    : 8  ; /* [7:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MEM_CTRL0_USB3;

/* Define the union U_SC_MEM_CTRL1_USB3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_254                 : 14  ; /* [31:18] */
        unsigned int    mem_power_mode_ram2_usb : 6  ; /* [17:12] */
        unsigned int    mem_power_mode_ram1_usb : 6  ; /* [11:6] */
        unsigned int    mem_power_mode_ram0_usb : 6  ; /* [5:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MEM_CTRL1_USB3;

/* Define the union U_SC_MEM_CTRL2_USB3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_255                 : 18  ; /* [31:14] */
        unsigned int    usb_tp_ram3_tmod        : 8  ; /* [13:6] */
        unsigned int    mem_power_mode_ram3_usb : 6  ; /* [5:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MEM_CTRL2_USB3;

/* Define the union U_SC_JTAG_AUTH_MEM_CTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_256                     : 19  ; /* [31:13] */
        unsigned int    jtag_auth_sp_ram_tmod       : 7  ; /* [12:6] */
        unsigned int    jtag_auth_sp_ram_power_mode : 6  ; /* [5:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_JTAG_AUTH_MEM_CTRL;

/* Define the union U_SC_BOOTROM_TIMING */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_bootrom_timing : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BOOTROM_TIMING;

/* Define the union U_SC_RGMII_BYP_CTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_257             : 30  ; /* [31:2] */
        unsigned int    sc_byp_en_spmi      : 1  ; /* [1] */
        unsigned int    sc_byp_en_rgmii_bus : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_RGMII_BYP_CTRL;

/* Define the union U_SC_BAK_DATA0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_bak_data0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BAK_DATA0;

/* Define the union U_SC_BAK_DATA1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_bak_data1 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BAK_DATA1;

/* Define the union U_SC_BAK_DATA2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_bak_data2 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BAK_DATA2;

/* Define the union U_SC_BAK_DATA3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_bak_data3 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BAK_DATA3;

/* Define the union U_SC_BAK_DATA4 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_bak_data4 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BAK_DATA4;

/* Define the union U_SC_BAK_DATA5 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_bak_data5 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BAK_DATA5;

/* Define the union U_SC_BAK_DATA6 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_bak_data6 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BAK_DATA6;

/* Define the union U_SC_BAK_DATA7 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_bak_data7 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BAK_DATA7;

/* Define the union U_SC_BAK_DATA8 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_bak_data8 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BAK_DATA8;

/* Define the union U_SC_BAK_DATA9 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_bak_data9 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BAK_DATA9;

/* Define the union U_SC_BAK_DATA10 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_bak_data10 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BAK_DATA10;

/* Define the union U_SC_BAK_DATA11 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_bak_data11 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BAK_DATA11;

/* Define the union U_SC_BAK_DATA12 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_bak_data12 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BAK_DATA12;

/* Define the union U_SC_BAK_DATA13 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_bak_data13 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BAK_DATA13;

/* Define the union U_SC_BAK_DATA14 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_bak_data14 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BAK_DATA14;

/* Define the union U_SC_BAK_DATA15 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_bak_data15 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BAK_DATA15;

/* Define the union U_SC_MBIST_CPUI_ENABLE */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_258           : 31  ; /* [31:1] */
        unsigned int    func_mbist_enable : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MBIST_CPUI_ENABLE;

/* Define the union U_SC_MBIST_CPUI_DATAIN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    func_mbist_wdata : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MBIST_CPUI_DATAIN;

/* Define the union U_SC_MBIST_CPUI_WRITE_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_259              : 31  ; /* [31:1] */
        unsigned int    func_mbist_wr_enable : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MBIST_CPUI_WRITE_EN;

/* Define the union U_SC_MBIST_CPUI_SMS_FUNC_RESET */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_260            : 31  ; /* [31:1] */
        unsigned int    func_mbist_reset_n : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MBIST_CPUI_SMS_FUNC_RESET;

/* Define the union U_SC_MBIST_CPUI_FUNC_RESET */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_261               : 26  ; /* [31:6] */
        unsigned int    mbist_req_fcm_ts      : 1  ; /* [5] */
        unsigned int    mbist_req_aicore1     : 1  ; /* [4] */
        unsigned int    mbist_req_aicore0     : 1  ; /* [3] */
        unsigned int    mbist_req_l2buff1     : 1  ; /* [2] */
        unsigned int    mbist_req_l2buff0     : 1  ; /* [1] */
        unsigned int    mbist_req_cpu_cluster : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MBIST_CPUI_FUNC_RESET;

/* Define the union U_SC_RGMII_WADDR_CTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_262          : 8  ; /* [31:24] */
        unsigned int    rgmii_waddr_ctrl : 24  ; /* [23:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_RGMII_WADDR_CTRL;

/* Define the union U_SC_RGMII_RADDR_CTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_263          : 8  ; /* [31:24] */
        unsigned int    rgmii_raddr_ctrl : 24  ; /* [23:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_RGMII_RADDR_CTRL;

/* Define the union U_SC_CFG_AWUSER_L_RGMII */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_cfg_awuser_l_rgmii : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CFG_AWUSER_L_RGMII;

/* Define the union U_SC_CFG_AWUSER_M_RGMII */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_cfg_awuser_m_rgmii : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CFG_AWUSER_M_RGMII;

/* Define the union U_SC_CFG_AWUSER_H_RGMII */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_264               : 28  ; /* [31:4] */
        unsigned int    sc_cfg_awuser_h_rgmii : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CFG_AWUSER_H_RGMII;

/* Define the union U_SC_CFG_ARUSER_L_RGMII */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_cfg_aruser_l_rgmii : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CFG_ARUSER_L_RGMII;

/* Define the union U_SC_CFG_ARUSER_M_RGMII */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_cfg_aruser_m_rgmii : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CFG_ARUSER_M_RGMII;

/* Define the union U_SC_CFG_ARUSER_H_RGMII */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_265               : 28  ; /* [31:4] */
        unsigned int    sc_cfg_aruser_h_rgmii : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CFG_ARUSER_H_RGMII;

/* Define the union U_SC_CFG_QOS_CTRL_RGMII */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_266            : 24  ; /* [31:8] */
        unsigned int    sc_cfg_awqos_rgmii : 4  ; /* [7:4] */
        unsigned int    sc_cfg_arqos_rgmii : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CFG_QOS_CTRL_RGMII;

/* Define the union U_SC_CFG_QOS_OVERFLOW_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_267                : 26  ; /* [31:6] */
        unsigned int    sc_cfg_qos_overflow_en : 6  ; /* [5:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CFG_QOS_OVERFLOW_EN;

/* Define the union U_SC_CFG_QOS_BACKPRESSURE_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_268                    : 29  ; /* [31:3] */
        unsigned int    sc_cfg_qos_backpressure_en : 3  ; /* [2:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CFG_QOS_BACKPRESSURE_EN;

/* Define the union U_SC_CFG_QOS_BACKPRESSURE_VALID */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_269                       : 26  ; /* [31:6] */
        unsigned int    sc_cfg_qos_backpressure_valid : 6  ; /* [5:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CFG_QOS_BACKPRESSURE_VALID;

/* Define the union U_SC_CFG_QOS_EXTEND_CYCLE_NUM */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_270                     : 22  ; /* [31:10] */
        unsigned int    sc_cfg_qos_extend_cycle_num : 10  ; /* [9:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CFG_QOS_EXTEND_CYCLE_NUM;

/* Define the union U_SC_CFG_QOS_VALID_INDICATE */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_271                   : 31  ; /* [31:1] */
        unsigned int    sc_cfg_qos_valid_indicate : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CFG_QOS_VALID_INDICATE;

/* Define the union U_SC_CFG_QOS_OVERFLOW_DDR */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_272                        : 22  ; /* [31:10] */
        unsigned int    sc_cfg_qos_overflow_ddr_level2 : 5  ; /* [9:5] */
        unsigned int    sc_cfg_qos_overflow_ddr_level1 : 5  ; /* [4:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CFG_QOS_OVERFLOW_DDR;

/* Define the union U_SC_CFG_QOS_BACKPRESSURE_SEL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_273                               : 30  ; /* [31:2] */
        unsigned int    sc_cfg_qos_backpressure_select_level2 : 1  ; /* [1] */
        unsigned int    sc_cfg_qos_backpressure_select_level1 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CFG_QOS_BACKPRESSURE_SEL;

/* Define the union U_SC_DDR_RETETION_CLR */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_274             : 31  ; /* [31:1] */
        unsigned int    sc_dram_reteion_clr : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDR_RETETION_CLR;

/* Define the union U_SC_RST_SRC_CLR */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_275        : 31  ; /* [31:1] */
        unsigned int    sc_rst_src_clr : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_RST_SRC_CLR;

/* Define the union U_SC_AI0_SVFD_CFG0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_276               : 22  ; /* [31:10] */
        unsigned int    ai0_svfd_div64_en     : 1  ; /* [9] */
        unsigned int    ai0_svfd_glitch_test  : 1  ; /* [8] */
        unsigned int    ai0_svfd_match_detect : 1  ; /* [7] */
        unsigned int    ai0_svfd_trim         : 1  ; /* [6] */
        unsigned int    ai0_svfd_on_mode      : 1  ; /* [5] */
        unsigned int    ai0_svfd_off_mode     : 1  ; /* [4] */
        unsigned int    ai0_svfd_d_rate       : 2  ; /* [3:2] */
        unsigned int    ai0_svfd_vdm_mod      : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AI0_SVFD_CFG0;

/* Define the union U_SC_AI0_SVFD_CFG1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_277                   : 19  ; /* [31:13] */
        unsigned int    ai0_svfd_test_in          : 4  ; /* [12:9] */
        unsigned int    ai0_svfd_cpm_out_div_sel  : 4  ; /* [8:5] */
        unsigned int    ai0_svfd_cpm_data_limit_e : 1  ; /* [4] */
        unsigned int    ai0_svfd_cpm_data_mode    : 2  ; /* [3:2] */
        unsigned int    ai0_svfd_cpm_edge_sel     : 1  ; /* [1] */
        unsigned int    ai0_svfd_cpm_vdm_period   : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AI0_SVFD_CFG1;

/* Define the union U_SC_AI0_SVFD_CFG2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_278          : 16  ; /* [31:16] */
        unsigned int    ai0_svfd_lvt_ll  : 4  ; /* [15:12] */
        unsigned int    ai0_svfd_lvt_sl  : 4  ; /* [11:8] */
        unsigned int    ai0_svfd_ulvt_ll : 4  ; /* [7:4] */
        unsigned int    ai0_svfd_ulvt_sl : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AI0_SVFD_CFG2;

/* Define the union U_SC_AI1_SVFD_CFG0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_279               : 22  ; /* [31:10] */
        unsigned int    ai1_svfd_div64_en     : 1  ; /* [9] */
        unsigned int    ai1_svfd_glitch_test  : 1  ; /* [8] */
        unsigned int    ai1_svfd_match_detect : 1  ; /* [7] */
        unsigned int    ai1_svfd_trim         : 1  ; /* [6] */
        unsigned int    ai1_svfd_on_mode      : 1  ; /* [5] */
        unsigned int    ai1_svfd_off_mode     : 1  ; /* [4] */
        unsigned int    ai1_svfd_d_rate       : 2  ; /* [3:2] */
        unsigned int    ai1_svfd_vdm_mod      : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AI1_SVFD_CFG0;

/* Define the union U_SC_AI1_SVFD_CFG1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_280                   : 19  ; /* [31:13] */
        unsigned int    ai1_svfd_test_in          : 4  ; /* [12:9] */
        unsigned int    ai1_svfd_cpm_out_div_sel  : 4  ; /* [8:5] */
        unsigned int    ai1_svfd_cpm_data_limit_e : 1  ; /* [4] */
        unsigned int    ai1_svfd_cpm_data_mode    : 2  ; /* [3:2] */
        unsigned int    ai1_svfd_cpm_edge_sel     : 1  ; /* [1] */
        unsigned int    ai1_svfd_cpm_vdm_period   : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AI1_SVFD_CFG1;

/* Define the union U_SC_AI1_SVFD_CFG2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_281          : 16  ; /* [31:16] */
        unsigned int    ai1_svfd_lvt_ll  : 4  ; /* [15:12] */
        unsigned int    ai1_svfd_lvt_sl  : 4  ; /* [11:8] */
        unsigned int    ai1_svfd_ulvt_ll : 4  ; /* [7:4] */
        unsigned int    ai1_svfd_ulvt_sl : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AI1_SVFD_CFG2;

/* Define the union U_SC_AI0_SVFD_BYPASS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_282         : 31  ; /* [31:1] */
        unsigned int    ai0_svfd_bypass : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AI0_SVFD_BYPASS;

/* Define the union U_SC_AI1_SVFD_BYPASS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_283         : 31  ; /* [31:1] */
        unsigned int    ai1_svfd_bypass : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AI1_SVFD_BYPASS;

/* Define the union U_SC_CPU_CRG_CTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    cpu_idle_div_bypass   : 1  ; /* [31] */
        unsigned int    cpu_div_cfg           : 5  ; /* [30:26] */
        unsigned int    cpu_div_idle_cfg      : 6  ; /* [25:20] */
        unsigned int    cpu_auto_wait_in_cfg  : 10  ; /* [19:10] */
        unsigned int    cpu_auto_wait_out_cfg : 10  ; /* [9:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CPU_CRG_CTRL;

/* Define the union U_SC_PLL_PROF_CFG0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_284                      : 4  ; /* [31:28] */
        unsigned int    pll0_clk_div_cfg_emmc        : 4  ; /* [27:24] */
        unsigned int    pll0_prof_clk_div_cfg_aicore : 6  ; /* [23:18] */
        unsigned int    pll2_prof_clk_div_cfg        : 6  ; /* [17:12] */
        unsigned int    pll1_prof_clk_div_cfg        : 6  ; /* [11:6] */
        unsigned int    pll0_prof_clk_div_cfg        : 6  ; /* [5:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL_PROF_CFG0;

/* Define the union U_SC_CFG_USBCTRL_SEL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_285            : 31  ; /* [31:1] */
        unsigned int    sc_cfg_usbctrl_sel : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CFG_USBCTRL_SEL;

/* Define the union U_SC_PLL_PROF_CFG1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_286               : 14  ; /* [31:18] */
        unsigned int    pll5_prof_clk_div_cfg : 6  ; /* [17:12] */
        unsigned int    pll4_prof_clk_div_cfg : 6  ; /* [11:6] */
        unsigned int    pll3_prof_clk_div_cfg : 6  ; /* [5:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL_PROF_CFG1;

/* Define the union U_SC_UTMI_WORD_IF */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_287         : 31  ; /* [31:1] */
        unsigned int    sc_utmi_word_if : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_UTMI_WORD_IF;

/* Define the union U_SC_BIAS_CTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_288      : 28  ; /* [31:4] */
        unsigned int    sc_pg_bias1  : 1  ; /* [3] */
        unsigned int    sc_pg_bias0  : 1  ; /* [2] */
        unsigned int    sc_msc_bias1 : 1  ; /* [1] */
        unsigned int    sc_msc_bias0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BIAS_CTRL;

/* Define the union U_SC_RGMII_SRC_INT */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_289                 : 8  ; /* [31:24] */
        unsigned int    gmiirx0_ecc_multi_err   : 1  ; /* [23] */
        unsigned int    rdopt_ecc_multi_err     : 1  ; /* [22] */
        unsigned int    wropt_ecc_multi_err     : 1  ; /* [21] */
        unsigned int    coretx0_ecc_multi_err   : 1  ; /* [20] */
        unsigned int    corerx0_ecc_multi_err   : 1  ; /* [19] */
        unsigned int    macdio0_ecc_multi_err   : 1  ; /* [18] */
        unsigned int    pmutx0_ecc_multi_err    : 1  ; /* [17] */
        unsigned int    pmurx0_ecc_multi_err    : 1  ; /* [16] */
        unsigned int    pmudesc03_ecc_multi_err : 1  ; /* [15] */
        unsigned int    pmudesc02_ecc_multi_err : 1  ; /* [14] */
        unsigned int    pmudesc01_ecc_multi_err : 1  ; /* [13] */
        unsigned int    pmudesc00_ecc_multi_err : 1  ; /* [12] */
        unsigned int    gmiirx0_ecc_err         : 1  ; /* [11] */
        unsigned int    rdopt_ecc_err           : 1  ; /* [10] */
        unsigned int    wropt_ecc_err           : 1  ; /* [9] */
        unsigned int    coretx0_ecc_err         : 1  ; /* [8] */
        unsigned int    corerx0_ecc_err         : 1  ; /* [7] */
        unsigned int    macdio0_ecc_err         : 1  ; /* [6] */
        unsigned int    pmutx0_ecc_err          : 1  ; /* [5] */
        unsigned int    pmurx0_ecc_err          : 1  ; /* [4] */
        unsigned int    pmudesc03_ecc_err       : 1  ; /* [3] */
        unsigned int    pmudesc02_ecc_err       : 1  ; /* [2] */
        unsigned int    pmudesc01_ecc_err       : 1  ; /* [1] */
        unsigned int    pmudesc00_ecc_err       : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_RGMII_SRC_INT;

/* Define the union U_SC_RGMII_INT_MASK */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_290                          : 8  ; /* [31:24] */
        unsigned int    gmiirx0_ecc_multi_err_int_mask   : 1  ; /* [23] */
        unsigned int    rdopt_ecc_multi_err_int_mask     : 1  ; /* [22] */
        unsigned int    wropt_ecc_multi_err_int_mask     : 1  ; /* [21] */
        unsigned int    coretx0_ecc_multi_err_int_mask   : 1  ; /* [20] */
        unsigned int    corerx0_ecc_multi_err_int_mask   : 1  ; /* [19] */
        unsigned int    macdio0_ecc_multi_err_int_mask   : 1  ; /* [18] */
        unsigned int    pmutx0_ecc_multi_err_int_mask    : 1  ; /* [17] */
        unsigned int    pmurx0_ecc_multi_err_int_mask    : 1  ; /* [16] */
        unsigned int    pmudesc03_ecc_multi_err_int_mask : 1  ; /* [15] */
        unsigned int    pmudesc02_ecc_multi_err_int_mask : 1  ; /* [14] */
        unsigned int    pmudesc01_ecc_multi_err_int_mask : 1  ; /* [13] */
        unsigned int    pmudesc00_ecc_multi_err_int_mask : 1  ; /* [12] */
        unsigned int    gmiirx0_ecc_err_int_mask         : 1  ; /* [11] */
        unsigned int    rdopt_ecc_err_int_mask           : 1  ; /* [10] */
        unsigned int    wropt_ecc_err_int_mask           : 1  ; /* [9] */
        unsigned int    coretx0_ecc_err_int_mask         : 1  ; /* [8] */
        unsigned int    corerx0_ecc_err_int_mask         : 1  ; /* [7] */
        unsigned int    macdio0_ecc_err_int_mask         : 1  ; /* [6] */
        unsigned int    pmutx0_ecc_err_int_mask          : 1  ; /* [5] */
        unsigned int    pmurx0_ecc_err_int_mask          : 1  ; /* [4] */
        unsigned int    pmudesc03_ecc_err_int_mask       : 1  ; /* [3] */
        unsigned int    pmudesc02_ecc_err_int_mask       : 1  ; /* [2] */
        unsigned int    pmudesc01_ecc_err_int_mask       : 1  ; /* [1] */
        unsigned int    pmudesc00_ecc_err_int_mask       : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_RGMII_INT_MASK;

/* Define the union U_SC_WDG_RST_MASK */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_291                  : 12  ; /* [31:20] */
        unsigned int    sc_wdg_ts_rst_mask       : 1  ; /* [19] */
        unsigned int    sc_wdg_security_rst_mask : 1  ; /* [18] */
        unsigned int    sc_wdg_rst_mask          : 10  ; /* [17:8] */
        unsigned int    sc_wdg_ddr_uce_rst_mask  : 8  ; /* [7:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_WDG_RST_MASK;

/* Define the union U_SC_USB3_TRACE_CTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_292              : 10  ; /* [31:22] */
        unsigned int    sc_usb3_trace_read   : 1  ; /* [21] */
        unsigned int    sc_usb3_trace_raddr  : 9  ; /* [20:12] */
        unsigned int    sc_usb3_trace_point  : 8  ; /* [11:4] */
        unsigned int    sc_usb3_trace_sel    : 2  ; /* [3:2] */
        unsigned int    sc_usb3_trace_clear  : 1  ; /* [1] */
        unsigned int    sc_usb3_trace_enable : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_TRACE_CTRL;

/* Define the union U_SC_USB3_TRACE_DATA_31_0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_usb3_trace_data_31_0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_TRACE_DATA_31_0;

/* Define the union U_SC_USB3_TRACE_DATA_63_32 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_usb3_trace_data_63_32 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_TRACE_DATA_63_32;

/* Define the union U_SC_USB3_TRACE_DATA_95_64 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_usb3_trace_data_95_64 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_TRACE_DATA_95_64;

/* Define the union U_SC_USB3_TRACE_DATA_127_96 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_usb3_trace_data_127_96 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_TRACE_DATA_127_96;

/* Define the union U_SC_USB3_TRACE_MASK_31_0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_usb3_trace_mask_31_0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_TRACE_MASK_31_0;

/* Define the union U_SC_USB3_TRACE_MASK_63_32 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_usb3_trace_mask_63_32 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_TRACE_MASK_63_32;

/* Define the union U_SC_USB3_TRACE_MASK_95_64 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_usb3_trace_mask_95_64 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_TRACE_MASK_95_64;

/* Define the union U_SC_USB3_TRACE_MASK_127_96 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_usb3_trace_mask_127_96 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_TRACE_MASK_127_96;

/* Define the union U_SC_TSENSOR_INT_MASK */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_293                             : 28  ; /* [31:4] */
        unsigned int    tsensor_ultra_over_int_mask_aicore1 : 1  ; /* [3] */
        unsigned int    tsensor_ultra_over_int_mask_aicore0 : 1  ; /* [2] */
        unsigned int    tsensor_ultra_over_int_mask_top     : 1  ; /* [1] */
        unsigned int    tsensor_ultra_over_int_mask_a55     : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_TSENSOR_INT_MASK;

/* Define the union U_SC_TS_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_294  : 31  ; /* [31:1] */
        unsigned int    sc_ts_en : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_TS_EN;

/* Define the union U_SC_TIMESTAMP_CLK_SEL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_295              : 31  ; /* [31:1] */
        unsigned int    sc_timestamp_clk_sel : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_TIMESTAMP_CLK_SEL;

/* Define the union U_SC_SLV_EXT_ACTIVE */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_296           : 31  ; /* [31:1] */
        unsigned int    sc_slv_ext_active : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SLV_EXT_ACTIVE;

/* Define the union U_SC_RING_LINK_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_297          : 31  ; /* [31:1] */
        unsigned int    sc_ring_link_req : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_RING_LINK_REQ;

/* Define the union U_SC_TEMP_PERIOD_AIC */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_298               : 20  ; /* [31:12] */
        unsigned int    temp_elim_period_cfg  : 6  ; /* [11:6] */
        unsigned int    temp_total_period_cfg : 6  ; /* [5:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_TEMP_PERIOD_AIC;

/* Define the union U_SC_AXI_CACHE_USB */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_299     : 24  ; /* [31:8] */
        unsigned int    arcache_usb : 4  ; /* [7:4] */
        unsigned int    awcache_usb : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AXI_CACHE_USB;

/* Define the union U_SC_BYPASS_CACHE_USB */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_300            : 30  ; /* [31:2] */
        unsigned int    arcache_bypass_usb : 1  ; /* [1] */
        unsigned int    awcache_bypass_usb : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BYPASS_CACHE_USB;

/* Define the union U_SC_PLL_SRC_INT */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_301     : 26  ; /* [31:6] */
        unsigned int    pll5_unlock : 1  ; /* [5] */
        unsigned int    pll4_unlock : 1  ; /* [4] */
        unsigned int    pll3_unlock : 1  ; /* [3] */
        unsigned int    pll2_unlock : 1  ; /* [2] */
        unsigned int    pll1_unlock : 1  ; /* [1] */
        unsigned int    pll0_unlock : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL_SRC_INT;

/* Define the union U_SC_PLL_INT_MASK */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_302              : 26  ; /* [31:6] */
        unsigned int    pll5_unlock_int_mask : 1  ; /* [5] */
        unsigned int    pll4_unlock_int_mask : 1  ; /* [4] */
        unsigned int    pll3_unlock_int_mask : 1  ; /* [3] */
        unsigned int    pll2_unlock_int_mask : 1  ; /* [2] */
        unsigned int    pll1_unlock_int_mask : 1  ; /* [1] */
        unsigned int    pll0_unlock_int_mask : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL_INT_MASK;

/* Define the union U_SC_DJTAG_SRC_INT */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_303           : 31  ; /* [31:1] */
        unsigned int    djtag_sta_timeout : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_SRC_INT;

/* Define the union U_SC_DJTAG_INT_MASK */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_304                    : 31  ; /* [31:1] */
        unsigned int    djtag_sta_timeout_int_mask : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_INT_MASK;

/* Define the union U_SC_XTAL_CTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_305    : 13  ; /* [31:19] */
        unsigned int    xtal_time  : 16  ; /* [18:3] */
        unsigned int    rsv_306    : 1  ; /* [2] */
        unsigned int    xtal_en_sw : 1  ; /* [1] */
        unsigned int    xtal_over  : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_XTAL_CTRL;

/* Define the union U_SC_ITCR */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_307 : 31  ; /* [31:1] */
        unsigned int    sc_itcr : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ITCR;

/* Define the union U_SC_ITIR0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_308  : 19  ; /* [31:13] */
        unsigned int    sc_itir0 : 13  ; /* [12:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ITIR0;

/* Define the union U_SC_ITOR */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_309 : 21  ; /* [31:11] */
        unsigned int    sc_itor : 11  ; /* [10:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ITOR;

/* Define the union U_SC_CNT_DATA_CFG */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_310         : 7  ; /* [31:25] */
        unsigned int    sc_cnt_data_cfg : 25  ; /* [24:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CNT_DATA_CFG;

/* Define the union U_SC_CNT_STEP_RSV_CFG */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_311 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CNT_STEP_RSV_CFG;

/* Define the union U_SC_CNT_CTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_312        : 29  ; /* [31:3] */
        unsigned int    test_load_time : 1  ; /* [2] */
        unsigned int    test_pll_en    : 1  ; /* [1] */
        unsigned int    test_mode_en   : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CNT_CTRL;

/* Define the union U_SC_IM_CTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_313    : 24  ; /* [31:8] */
        unsigned int    in_md_type : 1  ; /* [7] */
        unsigned int    it_md_clk  : 3  ; /* [6:4] */
        unsigned int    it_md_ctrl : 3  ; /* [3:1] */
        unsigned int    it_md_en   : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_IM_CTRL;

/* Define the union U_SC_IM_STAT */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_314    : 31  ; /* [31:1] */
        unsigned int    it_md_stat : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_IM_STAT;

/* Define the union U_SC_PROBE_SYSTEM_COUNTER_VALUE */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_315                    : 16  ; /* [31:16] */
        unsigned int    probe_system_counter_value : 16  ; /* [15:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PROBE_SYSTEM_COUNTER_VALUE;

/* Define the union U_SC_PROBE_SYSTEM_COUNTER_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_316                 : 31  ; /* [31:1] */
        unsigned int    probe_system_counter_en : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PROBE_SYSTEM_COUNTER_EN;

/* Define the union U_SC_PLL_LOCK_STATUS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_317   : 26  ; /* [31:6] */
        unsigned int    pll5_lock : 1  ; /* [5] */
        unsigned int    pll4_lock : 1  ; /* [4] */
        unsigned int    pll3_lock : 1  ; /* [3] */
        unsigned int    pll2_lock : 1  ; /* [2] */
        unsigned int    pll1_lock : 1  ; /* [1] */
        unsigned int    pll0_lock : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL_LOCK_STATUS;

/* Define the union U_SC_PLLCTRL_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_318 : 31  ; /* [31:1] */
        unsigned int    pll_on  : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLLCTRL_ST;

/* Define the union U_SC_DDRC_WARM_RST_ACKED */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_319        : 31  ; /* [31:1] */
        unsigned int    warm_rst_acked : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDRC_WARM_RST_ACKED;

/* Define the union U_SC_DDRC_IO_RESET_STATE */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_320        : 24  ; /* [31:8] */
        unsigned int    rst_state_ddr7 : 1  ; /* [7] */
        unsigned int    rst_state_ddr6 : 1  ; /* [6] */
        unsigned int    rst_state_ddr5 : 1  ; /* [5] */
        unsigned int    rst_state_ddr4 : 1  ; /* [4] */
        unsigned int    rsv_321        : 1  ; /* [3] */
        unsigned int    rsv_322        : 1  ; /* [2] */
        unsigned int    rsv_323        : 1  ; /* [1] */
        unsigned int    rsv_324        : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDRC_IO_RESET_STATE;

/* Define the union U_SC_SDMA_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_325     : 31  ; /* [31:1] */
        unsigned int    icg_st_sdma : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SDMA_CLK_ST;

/* Define the union U_SC_FTE_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_326    : 31  ; /* [31:1] */
        unsigned int    icg_st_fte : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_FTE_CLK_ST;

/* Define the union U_SC_SMMU_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_327     : 31  ; /* [31:1] */
        unsigned int    icg_st_smmu : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SMMU_CLK_ST;

/* Define the union U_SC_MII_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_328              : 26  ; /* [31:6] */
        unsigned int    icg_st_rgmii_bus     : 1  ; /* [5] */
        unsigned int    icg_st_rgmii_gsf_axi : 1  ; /* [4] */
        unsigned int    icg_st_rgmii_sys_pub : 1  ; /* [3] */
        unsigned int    icg_st_rgmii_gsf_125 : 1  ; /* [2] */
        unsigned int    icg_st_rgmii_crg_125 : 1  ; /* [1] */
        unsigned int    icg_st_rgmii_rx      : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MII_CLK_ST;

/* Define the union U_SC_USB_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_329              : 28  ; /* [31:4] */
        unsigned int    icg_st_usb_bus_early : 1  ; /* [3] */
        unsigned int    icg_st_usb_suspend   : 1  ; /* [2] */
        unsigned int    icg_st_usb_pipe3p    : 1  ; /* [1] */
        unsigned int    icg_st_usb_utmi      : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB_CLK_ST;

/* Define the union U_SC_SYS_COUNTER_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_330            : 31  ; /* [31:1] */
        unsigned int    icg_st_sys_counter : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SYS_COUNTER_CLK_ST;

/* Define the union U_SC_DDR_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_331    : 24  ; /* [31:8] */
        unsigned int    rsv_332    : 4  ; /* [7:4] */
        unsigned int    icg_st_ddr : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDR_CLK_ST;

/* Define the union U_SC_HHA_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_333     : 30  ; /* [31:2] */
        unsigned int    icg_st_hha1 : 1  ; /* [1] */
        unsigned int    rsv_334     : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_HHA_CLK_ST;

/* Define the union U_SC_MN_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_335    : 30  ; /* [31:2] */
        unsigned int    icg_st_mn1 : 1  ; /* [1] */
        unsigned int    rsv_336    : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MN_CLK_ST;

/* Define the union U_SC_DDR_EXMBIST_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_337             : 30  ; /* [31:2] */
        unsigned int    icg_st_exmbist_cfg  : 1  ; /* [1] */
        unsigned int    icg_st_exmbist_aclk : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDR_EXMBIST_CLK_ST;

/* Define the union U_SC_DDR_APB_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_338        : 26  ; /* [31:6] */
        unsigned int    rsv_339        : 1  ; /* [5] */
        unsigned int    icg_st_dum_apb : 1  ; /* [4] */
        unsigned int    rsv_340        : 1  ; /* [3] */
        unsigned int    icg_st_p2p_m   : 1  ; /* [2] */
        unsigned int    rsv_341        : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDR_APB_CLK_ST;

/* Define the union U_SC_PROBE_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_342      : 31  ; /* [31:1] */
        unsigned int    icg_st_probe : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PROBE_CLK_ST;

/* Define the union U_SC_LLC_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_343    : 31  ; /* [31:1] */
        unsigned int    icg_st_llc : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_LLC_CLK_ST;

/* Define the union U_SC_L2BUFF_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_344        : 31  ; /* [31:1] */
        unsigned int    icg_st_l2buff1 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_L2BUFF_CLK_ST;

/* Define the union U_SC_PCIE_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_345             : 23  ; /* [31:9] */
        unsigned int    icg_st_pipe         : 4  ; /* [8:5] */
        unsigned int    icg_st_phy_jtag_tck : 1  ; /* [4] */
        unsigned int    icg_st_phy_cr_para  : 1  ; /* [3] */
        unsigned int    rsv_346             : 1  ; /* [2] */
        unsigned int    rsv_347             : 1  ; /* [1] */
        unsigned int    rsv_348             : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PCIE_CLK_ST;

/* Define the union U_SC_I2C_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_349    : 31  ; /* [31:1] */
        unsigned int    icg_st_i2c : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_I2C_CLK_ST;

/* Define the union U_SC_TIMER_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_350      : 31  ; /* [31:1] */
        unsigned int    icg_st_timer : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_TIMER_CLK_ST;

/* Define the union U_SC_GPIO_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_351     : 30  ; /* [31:2] */
        unsigned int    icg_st_gpio : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_GPIO_CLK_ST;

/* Define the union U_SC_SFC_BUS_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_352        : 31  ; /* [31:1] */
        unsigned int    icg_st_sfc_bus : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SFC_BUS_CLK_ST;

/* Define the union U_SC_REF_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_353    : 31  ; /* [31:1] */
        unsigned int    icg_st_ref : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_REF_CLK_ST;

/* Define the union U_SC_GPIO_DB_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_354        : 31  ; /* [31:1] */
        unsigned int    icg_st_gpio_db : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_GPIO_DB_CLK_ST;

/* Define the union U_SC_DJTAG_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_355      : 31  ; /* [31:1] */
        unsigned int    icg_st_djtag : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_CLK_ST;

/* Define the union U_SC_FUNC_MBIST_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_356           : 31  ; /* [31:1] */
        unsigned int    icg_st_func_mbist : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_FUNC_MBIST_CLK_ST;

/* Define the union U_SC_HPM_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_357    : 31  ; /* [31:1] */
        unsigned int    icg_st_hpm : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_HPM_CLK_ST;

/* Define the union U_SC_ULTRASOC_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_358         : 30  ; /* [31:2] */
        unsigned int    icg_st_ultrasoc : 1  ; /* [1] */
        unsigned int    icg_st_chie_mon : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ULTRASOC_CLK_ST;

/* Define the union U_SC_SPMI_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_359     : 31  ; /* [31:1] */
        unsigned int    icg_st_spmi : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SPMI_CLK_ST;

/* Define the union U_SC_PWM_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_360       : 31  ; /* [31:1] */
        unsigned int    icg_st_pwm_8k : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PWM_CLK_ST;

/* Define the union U_SC_TIMESTAMP_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_361          : 31  ; /* [31:1] */
        unsigned int    icg_st_timestamp : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_TIMESTAMP_CLK_ST;

/* Define the union U_SC_L2BUFF_MBIST_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_362              : 30  ; /* [31:2] */
        unsigned int    icg_st_mbist_l2buff1 : 1  ; /* [1] */
        unsigned int    icg_st_mbist_l2buff0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_L2BUFF_MBIST_CLK_ST;

/* Define the union U_SC_SRC_AI_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_363        : 30  ; /* [31:2] */
        unsigned int    icg_st_src_ai1 : 1  ; /* [1] */
        unsigned int    icg_st_src_ai0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SRC_AI_CLK_ST;

/* Define the union U_SC_GIC_CPU_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_364             : 31  ; /* [31:1] */
        unsigned int    icg_st_gic_cpu_asyn : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_GIC_CPU_CLK_ST;

/* Define the union U_SC_CRS_CLK_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_365         : 31  ; /* [31:1] */
        unsigned int    icg_st_crs_asyn : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CRS_CLK_ST;

/* Define the union U_SC_SDMA_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_366      : 31  ; /* [31:1] */
        unsigned int    srst_st_sdma : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SDMA_RESET_ST;

/* Define the union U_SC_FTE_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_367     : 31  ; /* [31:1] */
        unsigned int    srst_st_fte : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_FTE_RESET_ST;

/* Define the union U_SC_USB_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_368              : 28  ; /* [31:4] */
        unsigned int    srst_st_usbphy_port  : 1  ; /* [3] */
        unsigned int    srst_st_usb_vcc      : 1  ; /* [2] */
        unsigned int    srst_st_usbphy_pipe0 : 1  ; /* [1] */
        unsigned int    srst_st_usbphy       : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB_RESET_ST;

/* Define the union U_SC_MII_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_369              : 30  ; /* [31:2] */
        unsigned int    srst_st_rgmii_gsf    : 1  ; /* [1] */
        unsigned int    srst_st_rgmii_mac_if : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MII_RESET_ST;

/* Define the union U_SC_SYS_COUNTER_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_370             : 31  ; /* [31:1] */
        unsigned int    srst_st_sys_counter : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SYS_COUNTER_RESET_ST;

/* Define the union U_SC_DDRC_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_371     : 24  ; /* [31:8] */
        unsigned int    rsv_372     : 4  ; /* [7:4] */
        unsigned int    srst_st_ddr : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDRC_RESET_ST;

/* Define the union U_SC_HHA_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_373      : 30  ; /* [31:2] */
        unsigned int    srst_st_hha1 : 1  ; /* [1] */
        unsigned int    rsv_374      : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_HHA_RESET_ST;

/* Define the union U_SC_MN_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_375     : 30  ; /* [31:2] */
        unsigned int    srst_st_mn1 : 1  ; /* [1] */
        unsigned int    rsv_376     : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MN_RESET_ST;

/* Define the union U_SC_DDRC_EXMBIST_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_377                : 30  ; /* [31:2] */
        unsigned int    srst_st_exmbist_areset : 1  ; /* [1] */
        unsigned int    srst_st_exmbist        : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDRC_EXMBIST_RESET_ST;

/* Define the union U_SC_DDRC_PACK_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_378       : 24  ; /* [31:8] */
        unsigned int    rsv_379       : 3  ; /* [7:5] */
        unsigned int    srst_st_dum   : 1  ; /* [4] */
        unsigned int    rsv_380       : 1  ; /* [3] */
        unsigned int    srst_st_p2p_m : 1  ; /* [2] */
        unsigned int    rsv_381       : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DDRC_PACK_RESET_ST;

/* Define the union U_SC_LLC_REGS_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_382     : 31  ; /* [31:1] */
        unsigned int    srst_st_llc : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_LLC_REGS_RESET_ST;

/* Define the union U_SC_L2BUFF_REGS_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_383         : 31  ; /* [31:1] */
        unsigned int    srst_st_l2buff1 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_L2BUFF_REGS_RESET_ST;

/* Define the union U_SC_PCIE_REGS_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_384          : 28  ; /* [31:4] */
        unsigned int    srst_st_pcie_phy : 1  ; /* [3] */
        unsigned int    rsv_385          : 1  ; /* [2] */
        unsigned int    srst_st_por_pcie : 1  ; /* [1] */
        unsigned int    srst_st_pcie     : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PCIE_REGS_RESET_ST;

/* Define the union U_SC_I2C_REGS_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_386     : 31  ; /* [31:1] */
        unsigned int    srst_st_i2c : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_I2C_REGS_RESET_ST;

/* Define the union U_SC_TIMER_REGS_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_387       : 31  ; /* [31:1] */
        unsigned int    srst_st_timer : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_TIMER_REGS_RESET_ST;

/* Define the union U_SC_GPIO_REGS_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_388      : 30  ; /* [31:2] */
        unsigned int    srst_st_gpio : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_GPIO_REGS_RESET_ST;

/* Define the union U_SC_SPMI_REGS_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_389      : 31  ; /* [31:1] */
        unsigned int    srst_st_spmi : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SPMI_REGS_RESET_ST;

/* Define the union U_SC_USB_UTMI_REGS_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_390          : 31  ; /* [31:1] */
        unsigned int    srst_st_usb_utmi : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB_UTMI_REGS_RESET_ST;

/* Define the union U_SC_ULTRASOC_REGS_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_391          : 30  ; /* [31:2] */
        unsigned int    ultrasoc_srst_st : 1  ; /* [1] */
        unsigned int    chie_mon_srst_st : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ULTRASOC_REGS_RESET_ST;

/* Define the union U_SC_CPM_REGS_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_392      : 30  ; /* [31:2] */
        unsigned int    srst_st_cpm1 : 1  ; /* [1] */
        unsigned int    srst_st_cpm0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CPM_REGS_RESET_ST;

/* Define the union U_SC_SVFD_REGS_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_393       : 30  ; /* [31:2] */
        unsigned int    srst_st_svfd1 : 1  ; /* [1] */
        unsigned int    srst_st_svfd0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SVFD_REGS_RESET_ST;

/* Define the union U_SC_BISR_S_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_394        : 31  ; /* [31:1] */
        unsigned int    srst_st_bisr_s : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BISR_S_RESET_ST;

/* Define the union U_SC_PWM_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_395        : 31  ; /* [31:1] */
        unsigned int    srst_st_pwm_8k : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PWM_RESET_ST;

/* Define the union U_SC_BISR_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_396      : 31  ; /* [31:1] */
        unsigned int    srst_st_bisr : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BISR_RESET_ST;

/* Define the union U_SC_STATUS_TRESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_397        : 31  ; /* [31:1] */
        unsigned int    srst_st_status : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_STATUS_TRESET_ST;

/* Define the union U_SC_AICORE0_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_398             : 29  ; /* [31:3] */
        unsigned int    rsv_399             : 1  ; /* [2] */
        unsigned int    srst_st_por_aicore0 : 1  ; /* [1] */
        unsigned int    srst_st_aicore0     : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AICORE0_RESET_ST;

/* Define the union U_SC_AICORE1_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_400             : 29  ; /* [31:3] */
        unsigned int    rsv_401             : 1  ; /* [2] */
        unsigned int    srst_st_por_aicore1 : 1  ; /* [1] */
        unsigned int    srst_st_aicore1     : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AICORE1_RESET_ST;

/* Define the union U_SC_CPU_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_402         : 29  ; /* [31:3] */
        unsigned int    rsv_403         : 1  ; /* [2] */
        unsigned int    srst_st_por_cpu : 1  ; /* [1] */
        unsigned int    srst_st_cpu     : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CPU_RESET_ST;

/* Define the union U_SC_SFC_BUS_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_404         : 31  ; /* [31:1] */
        unsigned int    srst_st_sfc_bus : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SFC_BUS_RESET_ST;

/* Define the union U_SC_STAMP_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_405           : 31  ; /* [31:1] */
        unsigned int    srst_st_timestamp : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_STAMP_RESET_ST;

/* Define the union U_SC_AICORE0_POWER_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_406               : 31  ; /* [31:1] */
        unsigned int    srst_st_power_aicore0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AICORE0_POWER_RESET_ST;

/* Define the union U_SC_AICORE1_POWER_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_407               : 31  ; /* [31:1] */
        unsigned int    srst_st_power_aicore1 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AICORE1_POWER_RESET_ST;

/* Define the union U_SC_CPU_POWER_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_408           : 31  ; /* [31:1] */
        unsigned int    srst_st_power_cpu : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CPU_POWER_RESET_ST;

/* Define the union U_SC_DJTAG_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_409       : 31  ; /* [31:1] */
        unsigned int    djtag_srst_st : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_RESET_ST;

/* Define the union U_SC_FUNC_MBIST_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_410            : 31  ; /* [31:1] */
        unsigned int    srst_st_func_mbist : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_FUNC_MBIST_RESET_ST;

/* Define the union U_SC_HPM_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_411     : 31  ; /* [31:1] */
        unsigned int    hpm_srst_st : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_HPM_RESET_ST;

/* Define the union U_SC_BISR_REPAIR_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_412             : 31  ; /* [31:1] */
        unsigned int    srst_st_bisr_repair : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BISR_REPAIR_RESET_ST;

/* Define the union U_SC_PCIE_POWER_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_413            : 31  ; /* [31:1] */
        unsigned int    srst_st_power_pcie : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PCIE_POWER_RESET_ST;

/* Define the union U_SC_I2C_CTRL_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_414              : 20  ; /* [31:12] */
        unsigned int    smbus_sda_cfg_st     : 1  ; /* [11] */
        unsigned int    smbus_dat_oe_cfg_st  : 1  ; /* [10] */
        unsigned int    smbus_dat_mux_sel_st : 1  ; /* [9] */
        unsigned int    smbus_scl_cfg_st     : 1  ; /* [8] */
        unsigned int    smbus_clk_oe_cfg_st  : 1  ; /* [7] */
        unsigned int    smbus_clk_mux_sel_st : 1  ; /* [6] */
        unsigned int    i2c0_sda_cfg_st      : 1  ; /* [5] */
        unsigned int    i2c0_dat_oe_cfg_st   : 1  ; /* [4] */
        unsigned int    i2c0_dat_mux_sel_st  : 1  ; /* [3] */
        unsigned int    i2c0_scl_cfg_st      : 1  ; /* [2] */
        unsigned int    i2c0_clk_oe_cfg_st   : 1  ; /* [1] */
        unsigned int    i2c0_clk_mux_sel_st  : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_I2C_CTRL_ST;

/* Define the union U_SC_DCIP_ST2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_415          : 28  ; /* [31:4] */
        unsigned int    flag_now_bcbist1 : 1  ; /* [3] */
        unsigned int    flag_bcbist1     : 1  ; /* [2] */
        unsigned int    flag_now_bcbist0 : 1  ; /* [1] */
        unsigned int    flag_bcbist0     : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DCIP_ST2;

/* Define the union U_SC_JTAG_AUTH_ST0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    jtag_auth_result_l32 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_JTAG_AUTH_ST0;

/* Define the union U_SC_JTAG_AUTH_ST1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    jtag_auth_result_h32 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_JTAG_AUTH_ST1;

/* Define the union U_SC_JTAG_AUTH_STAT */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_416             : 29  ; /* [31:3] */
        unsigned int    afs3_dft_disable    : 1  ; /* [2] */
        unsigned int    afs3_djtag_disable  : 1  ; /* [1] */
        unsigned int    jtag_auth_result_en : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_JTAG_AUTH_STAT;

/* Define the union U_SC_UCE_PROG_ST_DDR1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    uce_prog_state_ddrc7 : 8  ; /* [31:24] */
        unsigned int    uce_prog_state_ddrc6 : 8  ; /* [23:16] */
        unsigned int    uce_prog_state_ddrc5 : 8  ; /* [15:8] */
        unsigned int    uce_prog_state_ddrc4 : 8  ; /* [7:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_UCE_PROG_ST_DDR1;

/* Define the union U_SC_PMUDESC00_ECC_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_417                     : 8  ; /* [31:24] */
        unsigned int    pmudesc00_multi_err_addr    : 5  ; /* [23:19] */
        unsigned int    pmudesc00_multi_ecc_err_syn : 7  ; /* [18:12] */
        unsigned int    pmudesc00_err_addr          : 5  ; /* [11:7] */
        unsigned int    pmudesc00_ecc_err_syn       : 7  ; /* [6:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PMUDESC00_ECC_ST;

/* Define the union U_SC_PMUDESC01_ECC_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_418                     : 8  ; /* [31:24] */
        unsigned int    pmudesc01_multi_err_addr    : 5  ; /* [23:19] */
        unsigned int    pmudesc01_multi_ecc_err_syn : 7  ; /* [18:12] */
        unsigned int    pmudesc01_err_addr          : 5  ; /* [11:7] */
        unsigned int    pmudesc01_ecc_err_syn       : 7  ; /* [6:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PMUDESC01_ECC_ST;

/* Define the union U_SC_PMUDESC02_ECC_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_419                     : 8  ; /* [31:24] */
        unsigned int    pmudesc02_multi_err_addr    : 5  ; /* [23:19] */
        unsigned int    pmudesc02_multi_ecc_err_syn : 7  ; /* [18:12] */
        unsigned int    pmudesc02_err_addr          : 5  ; /* [11:7] */
        unsigned int    pmudesc02_ecc_err_syn       : 7  ; /* [6:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PMUDESC02_ECC_ST;

/* Define the union U_SC_PMUDESC03_ECC_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_420                     : 8  ; /* [31:24] */
        unsigned int    pmudesc03_multi_err_addr    : 5  ; /* [23:19] */
        unsigned int    pmudesc03_multi_ecc_err_syn : 7  ; /* [18:12] */
        unsigned int    pmudesc03_err_addr          : 5  ; /* [11:7] */
        unsigned int    pmudesc03_ecc_err_syn       : 7  ; /* [6:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PMUDESC03_ECC_ST;

/* Define the union U_SC_PMURX0_ECC_ST0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_421                  : 18  ; /* [31:14] */
        unsigned int    pmurx0_multi_ecc_err_syn : 7  ; /* [13:7] */
        unsigned int    pmurx0_ecc_err_syn       : 7  ; /* [6:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PMURX0_ECC_ST0;

/* Define the union U_SC_PMURX0_ECC_ST1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_422               : 12  ; /* [31:20] */
        unsigned int    pmurx0_err_addr       : 10  ; /* [19:10] */
        unsigned int    pmurx0_multi_err_addr : 10  ; /* [9:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PMURX0_ECC_ST1;

/* Define the union U_SC_PMUTX0_ECC_ST0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_423                  : 18  ; /* [31:14] */
        unsigned int    pmutx0_multi_ecc_err_syn : 7  ; /* [13:7] */
        unsigned int    pmutx0_ecc_err_syn       : 7  ; /* [6:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PMUTX0_ECC_ST0;

/* Define the union U_SC_PMUTX0_ECC_ST1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_424               : 12  ; /* [31:20] */
        unsigned int    pmutx0_err_addr       : 10  ; /* [19:10] */
        unsigned int    pmutx0_multi_err_addr : 10  ; /* [9:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PMUTX0_ECC_ST1;

/* Define the union U_SC_MACDIO0_ECC_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_425                   : 6  ; /* [31:26] */
        unsigned int    macdio0_multi_err_addr    : 6  ; /* [25:20] */
        unsigned int    macdio0_multi_ecc_err_syn : 7  ; /* [19:13] */
        unsigned int    macdio0_err_addr          : 6  ; /* [12:7] */
        unsigned int    macdio0_ecc_err_syn       : 7  ; /* [6:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MACDIO0_ECC_ST;

/* Define the union U_SC_CORERX0_ECC_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_426                   : 8  ; /* [31:24] */
        unsigned int    corerx0_multi_err_addr    : 5  ; /* [23:19] */
        unsigned int    corerx0_multi_ecc_err_syn : 7  ; /* [18:12] */
        unsigned int    corerx0_err_addr          : 5  ; /* [11:7] */
        unsigned int    corerx0_ecc_err_syn       : 7  ; /* [6:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CORERX0_ECC_ST;

/* Define the union U_SC_CORETX0_ECC_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_427                   : 8  ; /* [31:24] */
        unsigned int    coretx0_multi_err_addr    : 5  ; /* [23:19] */
        unsigned int    coretx0_multi_ecc_err_syn : 7  ; /* [18:12] */
        unsigned int    coretx0_err_addr          : 5  ; /* [11:7] */
        unsigned int    coretx0_ecc_err_syn       : 7  ; /* [6:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CORETX0_ECC_ST;

/* Define the union U_SC_WROPT_ECC_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_428                 : 8  ; /* [31:24] */
        unsigned int    wropt_multi_err_addr    : 4  ; /* [23:20] */
        unsigned int    wropt_multi_ecc_err_syn : 8  ; /* [19:12] */
        unsigned int    wropt_err_addr          : 4  ; /* [11:8] */
        unsigned int    wropt_ecc_err_syn       : 8  ; /* [7:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_WROPT_ECC_ST;

/* Define the union U_SC_RDOPT_ECC_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_429                 : 6  ; /* [31:26] */
        unsigned int    rdopt_multi_err_addr    : 5  ; /* [25:21] */
        unsigned int    rdopt_multi_ecc_err_syn : 8  ; /* [20:13] */
        unsigned int    rdopt_err_addr          : 5  ; /* [12:8] */
        unsigned int    rdopt_ecc_err_syn       : 8  ; /* [7:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_RDOPT_ECC_ST;

/* Define the union U_SC_GMIIRX0_ECC_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_430                   : 6  ; /* [31:26] */
        unsigned int    gmiirx0_multi_err_addr    : 7  ; /* [25:19] */
        unsigned int    gmiirx0_multi_ecc_err_syn : 6  ; /* [18:13] */
        unsigned int    gmiirx0_err_addr          : 7  ; /* [12:6] */
        unsigned int    gmiirx0_ecc_err_syn       : 6  ; /* [5:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_GMIIRX0_ECC_ST;

/* Define the union U_SC_USB_RAM0_ECC_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_431                : 10  ; /* [31:22] */
        unsigned int    usb_ram0_ecc_err_addr  : 11  ; /* [21:11] */
        unsigned int    usb_ram0_ecc_err_syn   : 9  ; /* [10:2] */
        unsigned int    usb_ram0_ecc_err       : 1  ; /* [1] */
        unsigned int    usb_ram0_ecc_multi_err : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB_RAM0_ECC_ST;

/* Define the union U_SC_USB_RAM1_ECC_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_432                : 8  ; /* [31:24] */
        unsigned int    usb_ram1_ecc_err_addr  : 13  ; /* [23:11] */
        unsigned int    usb_ram1_ecc_err_syn   : 9  ; /* [10:2] */
        unsigned int    usb_ram1_ecc_err       : 1  ; /* [1] */
        unsigned int    usb_ram1_ecc_multi_err : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB_RAM1_ECC_ST;

/* Define the union U_SC_USB_RAM2_ECC_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_433                : 12  ; /* [31:20] */
        unsigned int    usb_ram2_ecc_err_addr  : 9  ; /* [19:11] */
        unsigned int    usb_ram2_ecc_err_syn   : 9  ; /* [10:2] */
        unsigned int    usb_ram2_ecc_err       : 1  ; /* [1] */
        unsigned int    usb_ram2_ecc_multi_err : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB_RAM2_ECC_ST;

/* Define the union U_SC_USB_RAM3_ECC_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_434                : 12  ; /* [31:20] */
        unsigned int    usb_ram3_ecc_err_addr  : 9  ; /* [19:11] */
        unsigned int    usb_ram3_ecc_err_syn   : 9  ; /* [10:2] */
        unsigned int    usb_ram3_ecc_err       : 1  ; /* [1] */
        unsigned int    usb_ram3_ecc_multi_err : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB_RAM3_ECC_ST;

/* Define the union U_SC_USB3_TRACE_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_435              : 22  ; /* [31:10] */
        unsigned int    usb3_trace_fire_addr : 8  ; /* [9:2] */
        unsigned int    usb3_trace_full      : 1  ; /* [1] */
        unsigned int    usb3_trace_done      : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_TRACE_ST;

/* Define the union U_SC_USB3_TRACE_RDATA_31_0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_usb3_trace_rdata_31_0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_TRACE_RDATA_31_0;

/* Define the union U_SC_USB3_TRACE_RDATA_63_32 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_usb3_trace_rdata_63_32 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_TRACE_RDATA_63_32;

/* Define the union U_SC_USB3_TRACE_RDATA_95_64 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_usb3_trace_rdata_95_64 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_TRACE_RDATA_95_64;

/* Define the union U_SC_USB3_TRACE_RDATA_127_96 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_usb3_trace_rdata_127_96 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_TRACE_RDATA_127_96;

/* Define the union U_SC_RING_LINK_ACK */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_436             : 29  ; /* [31:3] */
        unsigned int    sc_ring_link_ack_io : 1  ; /* [2] */
        unsigned int    sc_ring_link_req_io : 1  ; /* [1] */
        unsigned int    sc_ring_link_ack    : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_RING_LINK_ACK;

/* Define the union U_SC_CPU_IDLE_DIV_STAT */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_437              : 31  ; /* [31:1] */
        unsigned int    sc_cpu_idle_div_stat : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CPU_IDLE_DIV_STAT;

/* Define the union U_SC_DRAM_RETENTION_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_438                   : 31  ; /* [31:1] */
        unsigned int    sc_dram_retention_ctrl_st : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DRAM_RETENTION_ST;

/* Define the union U_SC_AI0_SVFD_ST0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_439                : 29  ; /* [31:3] */
        unsigned int    ai0_svfd_match_result  : 1  ; /* [2] */
        unsigned int    ai0_svfd_glitch_result : 1  ; /* [1] */
        unsigned int    ai0_svfd_lock          : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AI0_SVFD_ST0;

/* Define the union U_SC_AI0_SVFD_ST1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_440                 : 11  ; /* [31:21] */
        unsigned int    ai0_svfd_cpm_test_out   : 4  ; /* [20:17] */
        unsigned int    ai0_svfd_cpm_data_valid : 1  ; /* [16] */
        unsigned int    ai0_svfd_cpm_data       : 16  ; /* [15:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AI0_SVFD_ST1;

/* Define the union U_SC_AI1_SVFD_ST0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_441                : 29  ; /* [31:3] */
        unsigned int    ai1_svfd_match_result  : 1  ; /* [2] */
        unsigned int    ai1_svfd_glitch_result : 1  ; /* [1] */
        unsigned int    ai1_svfd_lock          : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AI1_SVFD_ST0;

/* Define the union U_SC_AI1_SVFD_ST1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_442                 : 11  ; /* [31:21] */
        unsigned int    ai1_svfd_cpm_test_out   : 4  ; /* [20:17] */
        unsigned int    ai1_svfd_cpm_data_valid : 1  ; /* [16] */
        unsigned int    ai1_svfd_cpm_data       : 16  ; /* [15:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_AI1_SVFD_ST1;

/* Define the union U_SC_RST_SRC */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_rst_src : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_RST_SRC;

/* Define the union U_SC_RST_SRC_FLAG */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_443         : 31  ; /* [31:1] */
        unsigned int    sc_rst_src_flag : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_RST_SRC_FLAG;

/* Define the union U_SC_MBIST_CPUI_DATAOUT */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    func_mbist_rdata : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MBIST_CPUI_DATAOUT;

/* Define the union U_SC_RGMII_INT_STATUS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_444                            : 8  ; /* [31:24] */
        unsigned int    gmiirx0_ecc_multi_err_int_status   : 1  ; /* [23] */
        unsigned int    rdopt_ecc_multi_err_int_status     : 1  ; /* [22] */
        unsigned int    wropt_ecc_multi_err_int_status     : 1  ; /* [21] */
        unsigned int    coretx0_ecc_multi_err_int_status   : 1  ; /* [20] */
        unsigned int    corerx0_ecc_multi_err_int_status   : 1  ; /* [19] */
        unsigned int    macdio0_ecc_multi_err_int_status   : 1  ; /* [18] */
        unsigned int    pmutx0_ecc_multi_err_int_status    : 1  ; /* [17] */
        unsigned int    pmurx0_ecc_multi_err_int_status    : 1  ; /* [16] */
        unsigned int    pmudesc03_ecc_multi_err_int_status : 1  ; /* [15] */
        unsigned int    pmudesc02_ecc_multi_err_int_status : 1  ; /* [14] */
        unsigned int    pmudesc01_ecc_multi_err_int_status : 1  ; /* [13] */
        unsigned int    pmudesc00_ecc_multi_err_int_status : 1  ; /* [12] */
        unsigned int    gmiirx0_ecc_err_int_status         : 1  ; /* [11] */
        unsigned int    rdopt_ecc_err_int_status           : 1  ; /* [10] */
        unsigned int    wropt_ecc_err_int_status           : 1  ; /* [9] */
        unsigned int    coretx0_ecc_err_int_status         : 1  ; /* [8] */
        unsigned int    corerx0_ecc_err_int_status         : 1  ; /* [7] */
        unsigned int    macdio0_ecc_err_int_status         : 1  ; /* [6] */
        unsigned int    pmutx0_ecc_err_int_status          : 1  ; /* [5] */
        unsigned int    pmurx0_ecc_err_int_status          : 1  ; /* [4] */
        unsigned int    pmudesc03_ecc_err_int_status       : 1  ; /* [3] */
        unsigned int    pmudesc02_ecc_err_int_status       : 1  ; /* [2] */
        unsigned int    pmudesc01_ecc_err_int_status       : 1  ; /* [1] */
        unsigned int    pmudesc00_ecc_err_int_status       : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_RGMII_INT_STATUS;

/* Define the union U_SC_PLL_INT_STATUS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_445                : 26  ; /* [31:6] */
        unsigned int    pll5_unlock_int_status : 1  ; /* [5] */
        unsigned int    pll4_unlock_int_status : 1  ; /* [4] */
        unsigned int    pll3_unlock_int_status : 1  ; /* [3] */
        unsigned int    pll2_unlock_int_status : 1  ; /* [2] */
        unsigned int    pll1_unlock_int_status : 1  ; /* [1] */
        unsigned int    pll0_unlock_int_status : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PLL_INT_STATUS;

/* Define the union U_SC_DJTAG_INT_STATUS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_446                  : 31  ; /* [31:1] */
        unsigned int    djtag_timeout_int_status : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_INT_STATUS;

/* Define the union U_SC_TSENSOR_INT_STATUS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_447                  : 30  ; /* [31:2] */
        unsigned int    tsensor_over_int_status  : 1  ; /* [1] */
        unsigned int    tsensor_under_int_status : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_TSENSOR_INT_STATUS;

/* Define the union U_SC_XTAL_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_448 : 31  ; /* [31:1] */
        unsigned int    xtal_on : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_XTAL_ST;

/* Define the union U_SC_CNT_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_449          : 31  ; /* [31:1] */
        unsigned int    xtal_pll_timeout : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CNT_ST;

/* Define the union U_SC_ITIR0_TEST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_450      : 19  ; /* [31:13] */
        unsigned int    sc_itir0_tst : 13  ; /* [12:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ITIR0_TEST;

/* Define the union U_SC_ITOR_TEST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_451     : 21  ; /* [31:11] */
        unsigned int    sc_itor_tst : 11  ; /* [10:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ITOR_TEST;

/* Define the union U_SC_CNT_DATA */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_452     : 7  ; /* [31:25] */
        unsigned int    sc_cnt_data : 25  ; /* [24:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_CNT_DATA;

/* Define the union U_SYS_SLEEP_CFG */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_453      : 6  ; /* [31:26] */
        unsigned int    deepsleep_en : 1  ; /* [25] */
        unsigned int    rsv_454      : 22  ; /* [24:3] */
        unsigned int    rsv_455      : 3  ; /* [2:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SYS_SLEEP_CFG;

/* Define the union U_SYS_SLEEP_STATE */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_456     : 20  ; /* [31:12] */
        unsigned int    sys_mode    : 4  ; /* [11:8] */
        unsigned int    rsv_457     : 3  ; /* [7:5] */
        unsigned int    sleeped     : 1  ; /* [4] */
        unsigned int    rsv_458     : 3  ; /* [3:1] */
        unsigned int    deepsleeped : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SYS_SLEEP_STATE;

/* Define the union U_SYS_TCXO_CTRL_CFG */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_459            : 6  ; /* [31:26] */
        unsigned int    tcxodown_bypass1   : 1  ; /* [25] */
        unsigned int    tcxodown_bypass0   : 1  ; /* [24] */
        unsigned int    tcxoseq1_time      : 5  ; /* [23:19] */
        unsigned int    tcxoseq0_time      : 5  ; /* [18:14] */
        unsigned int    tcxoseq_bypass     : 1  ; /* [13] */
        unsigned int    timeout_bypass1    : 1  ; /* [12] */
        unsigned int    timeout_bypass0    : 1  ; /* [11] */
        unsigned int    ctrlsel0_apb       : 1  ; /* [10] */
        unsigned int    ctrlen0_apb        : 1  ; /* [9] */
        unsigned int    ctrlsel1_apb       : 1  ; /* [8] */
        unsigned int    ctrlen1_apb        : 1  ; /* [7] */
        unsigned int    tcxofast1_ctrl     : 1  ; /* [6] */
        unsigned int    tcxofast0_ctrl     : 1  ; /* [5] */
        unsigned int    defau_tcxo         : 1  ; /* [4] */
        unsigned int    tcxosoft_apb       : 1  ; /* [3] */
        unsigned int    tcxosel_apb        : 1  ; /* [2] */
        unsigned int    tcxohardcon_bypass : 1  ; /* [1] */
        unsigned int    tcxopresel_apb     : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SYS_TCXO_CTRL_CFG;

/* Define the union U_SYS_TCXO0_TIMEOUT */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    timeoutcnt0_apb : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SYS_TCXO0_TIMEOUT;

/* Define the union U_SYS_TCXO1_TIEOUT */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    timeoutcnt1_apb : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SYS_TCXO1_TIEOUT;

/* Define the union U_SYS_TCXO_CTRL_STATE */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_460         : 18  ; /* [31:14] */
        unsigned int    tcxoseq_finish1 : 1  ; /* [13] */
        unsigned int    tcxoseq_finish0 : 1  ; /* [12] */
        unsigned int    abbbuf_en1      : 1  ; /* [11] */
        unsigned int    abbbuf_en0      : 1  ; /* [10] */
        unsigned int    clkgt_ctrl1     : 1  ; /* [9] */
        unsigned int    clkgt_ctrl0     : 1  ; /* [8] */
        unsigned int    clkgt_ctrl      : 1  ; /* [7] */
        unsigned int    sysclk_sel      : 1  ; /* [6] */
        unsigned int    sysclk_en1      : 1  ; /* [5] */
        unsigned int    sysclk_en0      : 1  ; /* [4] */
        unsigned int    tcxo_timeout1   : 1  ; /* [3] */
        unsigned int    tcxo_timeout0   : 1  ; /* [2] */
        unsigned int    tcxo1_en        : 1  ; /* [1] */
        unsigned int    tcxo0_en        : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SYS_TCXO_CTRL_STATE;

/* Define the union U_SYS_PWRDN_TIME */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_461             : 7  ; /* [31:25] */
        unsigned int    pw_peri_pwrdowntime : 25  ; /* [24:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SYS_PWRDN_TIME;

/* Define the union U_SYS_PWRUP_TIME */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_462           : 7  ; /* [31:25] */
        unsigned int    pw_peri_pwruptime : 25  ; /* [24:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SYS_PWRUP_TIME;

/* Define the union U_SYS_PWR_CTRL_CFG */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_463                : 6  ; /* [31:26] */
        unsigned int    ring_link_bypass       : 1  ; /* [25] */
        unsigned int    ring_ulnk_bypass       : 1  ; /* [24] */
        unsigned int    timeout_op_disiso      : 1  ; /* [23] */
        unsigned int    timeout_op_rston2      : 1  ; /* [22] */
        unsigned int    timeout_op_downperi    : 1  ; /* [21] */
        unsigned int    timeout_op_eniso       : 1  ; /* [20] */
        unsigned int    timeout_op_clkoff      : 1  ; /* [19] */
        unsigned int    timeout_op_rston       : 1  ; /* [18] */
        unsigned int    rsv_464                : 1  ; /* [17] */
        unsigned int    m3idle_bypass          : 1  ; /* [16] */
        unsigned int    rsv_465                : 4  ; /* [15:12] */
        unsigned int    sc_io_retention_bypass : 1  ; /* [11] */
        unsigned int    sc_ring_gten_bypass    : 1  ; /* [10] */
        unsigned int    sc_ring_clock_gten     : 1  ; /* [9] */
        unsigned int    sc_peri_io_retention   : 1  ; /* [8] */
        unsigned int    usb_iso_en             : 1  ; /* [7] */
        unsigned int    pcie_iso_en            : 1  ; /* [6] */
        unsigned int    ai1_iso_en             : 1  ; /* [5] */
        unsigned int    ai0_iso_en             : 1  ; /* [4] */
        unsigned int    dvpp_iso_en            : 1  ; /* [3] */
        unsigned int    ddr_iso_en             : 1  ; /* [2] */
        unsigned int    rsv_466                : 1  ; /* [1] */
        unsigned int    cluster_iso_en         : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SYS_PWR_CTRL_CFG;

/* Define the union U_SC_MDCTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_467    : 29  ; /* [31:3] */
        unsigned int    lp_md_ctrl : 3  ; /* [2:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MDCTRL;

/* Define the union U_SC_SLEEP */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_468    : 31  ; /* [31:1] */
        unsigned int    sc_sleeped : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SLEEP;

/* Define the union U_SC_DEEPSLEEP */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_469        : 31  ; /* [31:1] */
        unsigned int    sc_deepsleeped : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DEEPSLEEP;

/* Define the union U_SC_DJTAG_SEC_ACC_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_470          : 31  ; /* [31:1] */
        unsigned int    djtag_sec_acc_en : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_SEC_ACC_EN;

/* Define the union U_SC_DJTAG_MSTR_ADDR */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_471         : 1  ; /* [31] */
        unsigned int    djtag_mstr_addr : 31  ; /* [30:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_MSTR_ADDR;

/* Define the union U_SC_DJTAG_MSTR_DATA */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    djtag_mstr_data : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_MSTR_DATA;

/* Define the union U_SC_DJTAG_MSTR_CFG */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    djtag_mstr_disable : 1  ; /* [31] */
        unsigned int    djtag_nor_cfg_en   : 1  ; /* [30] */
        unsigned int    djtag_mstr_wr      : 1  ; /* [29] */
        unsigned int    rsv_472            : 5  ; /* [28:24] */
        unsigned int    debug_module_sel   : 8  ; /* [23:16] */
        unsigned int    chain_unit_cfg_en  : 16  ; /* [15:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_MSTR_CFG;

/* Define the union U_SC_DJTAG_MSTR_START_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_473             : 31  ; /* [31:1] */
        unsigned int    djtag_mstr_start_en : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_MSTR_START_EN;

/* Define the union U_SC_DJTAG_MSTR_PIPE_CFG */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_474                  : 23  ; /* [31:9] */
        unsigned int    djtag_cpui_pipe_en       : 1  ; /* [8] */
        unsigned int    rsv_475                  : 1  ; /* [7] */
        unsigned int    djtag_mstr_pipe_wait_num : 7  ; /* [6:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_MSTR_PIPE_CFG;

/* Define the union U_SC_DJTAG_TMOUT */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    djtag_tmout : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_TMOUT;

/* Define the union U_SC_EFUSE_SECURE_INFO */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_476        : 31  ; /* [31:1] */
        unsigned int    djtag_ns_allow : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_EFUSE_SECURE_INFO;

/* Define the union U_SC_EFUSE_SECURE_INF_AO */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_477                 : 1  ; /* [31] */
        unsigned int    efuse_ai_freq_lock_ao   : 2  ; /* [30:29] */
        unsigned int    rsv_478                 : 3  ; /* [28:26] */
        unsigned int    efuse_dvpp_vdec_half_ao : 2  ; /* [25:24] */
        unsigned int    rsv_479                 : 3  ; /* [23:21] */
        unsigned int    efuse_allscan_forbid_ao : 1  ; /* [20] */
        unsigned int    rsv_480                 : 3  ; /* [19:17] */
        unsigned int    efuse_j2djs_forbid_ao   : 1  ; /* [16] */
        unsigned int    rsv_481                 : 3  ; /* [15:13] */
        unsigned int    efuse_sj2tdre_forbid_ao : 1  ; /* [12] */
        unsigned int    efuse_dbgen_ao          : 1  ; /* [11] */
        unsigned int    efuse_niden_ao          : 1  ; /* [10] */
        unsigned int    efuse_sdbg_ctrl_ao      : 2  ; /* [9:8] */
        unsigned int    rsv_482                 : 1  ; /* [7] */
        unsigned int    efuse_jtag_forbid_ao    : 3  ; /* [6:4] */
        unsigned int    rsv_483                 : 3  ; /* [3:1] */
        unsigned int    efuse_key_cfged_ao      : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_EFUSE_SECURE_INF_AO;

/* Define the union U_SC_EFUSE_NS_FORBID */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_484            : 31  ; /* [31:1] */
        unsigned int    efuse_ns_forbid_ao : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_EFUSE_NS_FORBID;

/* Define the union U_SC_EFUSE_SECURE_INF_AO1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_485                  : 28  ; /* [31:4] */
        unsigned int    efuse_sys_access_lock_ao : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_EFUSE_SECURE_INF_AO1;

/* Define the union U_SC_BOOT_INFO */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_486          : 21  ; /* [31:11] */
        unsigned int    pad_sysclk_sel   : 1  ; /* [10] */
        unsigned int    pad_boot_cfg     : 1  ; /* [9] */
        unsigned int    pad_a55_spi_md   : 1  ; /* [8] */
        unsigned int    pad_i2c_slv_addr : 3  ; /* [7:5] */
        unsigned int    pad_emmc_sd_sel  : 1  ; /* [4] */
        unsigned int    pcie_rc_ep_md    : 1  ; /* [3] */
        unsigned int    boot_md_info     : 3  ; /* [2:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BOOT_INFO;

/* Define the union U_SC_PAD_INFO */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_487        : 31  ; /* [31:1] */
        unsigned int    pad_probe_mode : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PAD_INFO;

/* Define the union U_SC_LAST_RST_STATUS */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_488         : 12  ; /* [31:20] */
        unsigned int    last_rst_status : 20  ; /* [19:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_LAST_RST_STATUS;

/* Define the union U_SC_BOARD_CFG_INFO */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_489        : 10  ; /* [31:22] */
        unsigned int    board_cfg_info : 22  ; /* [21:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_BOARD_CFG_INFO;

/* Define the union U_SC_EFUSE_HARD_REPAIR_DONE */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_490                       : 8  ; /* [31:24] */
        unsigned int    repair_load_done_dvpp         : 1  ; /* [23] */
        unsigned int    repair_load_done_pcie         : 1  ; /* [22] */
        unsigned int    repair_load_done_peri_llc_hha : 1  ; /* [21] */
        unsigned int    repair_load_done_pcie_io      : 1  ; /* [20] */
        unsigned int    repair_load_done_ddr0         : 1  ; /* [19] */
        unsigned int    repair_load_done_ddr1         : 1  ; /* [18] */
        unsigned int    repair_load_done_cpu_cluster  : 1  ; /* [17] */
        unsigned int    repair_load_done_ts           : 1  ; /* [16] */
        unsigned int    repair_load_done_dvpp_l2buf   : 1  ; /* [15] */
        unsigned int    repair_load_done_a55_0        : 1  ; /* [14] */
        unsigned int    repair_load_done_a55_1        : 1  ; /* [13] */
        unsigned int    repair_load_done_a55_2        : 1  ; /* [12] */
        unsigned int    repair_load_done_a55_3        : 1  ; /* [11] */
        unsigned int    repair_load_done_a55_4        : 1  ; /* [10] */
        unsigned int    repair_load_done_a55_5        : 1  ; /* [9] */
        unsigned int    repair_load_done_a55_6        : 1  ; /* [8] */
        unsigned int    repair_load_done_a55_7        : 1  ; /* [7] */
        unsigned int    repair_load_done_aic_0        : 1  ; /* [6] */
        unsigned int    repair_load_done_aic_1        : 1  ; /* [5] */
        unsigned int    repair_load_done_aic_2        : 1  ; /* [4] */
        unsigned int    repair_load_done_aic_3        : 1  ; /* [3] */
        unsigned int    efuse_hard_repair_done2       : 1  ; /* [2] */
        unsigned int    efuse_hard_repair_done1       : 1  ; /* [1] */
        unsigned int    efuse_hard_repair_done0       : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_EFUSE_HARD_REPAIR_DONE;

/* Define the union U_SYSCTRL_CFG_VERSION0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sysctrl_cfg_version0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SYSCTRL_CFG_VERSION0;

/* Define the union U_SYSCTRL_CFG_MAGIC_WORD */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sysctrl_cfg_magic_word : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SYSCTRL_CFG_MAGIC_WORD;

/* Define the union U_SYSCTRL_CFG_ECO_CFG0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sysctrl_cfg_eco_cfg0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SYSCTRL_CFG_ECO_CFG0;

/* Define the union U_SYSCTRL_CFG_ECO_CFG1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sysctrl_cfg_eco_cfg1 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SYSCTRL_CFG_ECO_CFG1;

/* Define the union U_SYSCTRL_CFG_ECO_CFG2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sysctrl_cfg_eco_cfg2 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SYSCTRL_CFG_ECO_CFG2;

/* Define the union U_SYSCTRL_CFG_ECO_CFG3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sysctrl_cfg_eco_cfg3 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SYSCTRL_CFG_ECO_CFG3;

/* Define the union U_SC_DIE_ID0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    die_id31_0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DIE_ID0;

/* Define the union U_SC_DIE_ID1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    die_id63_32 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DIE_ID1;

/* Define the union U_SC_DIE_ID2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    die_id95_64 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DIE_ID2;

/* Define the union U_SC_DIE_ID3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    die_id127_96 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DIE_ID3;

/* Define the union U_SC_DIE_ID4 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    die_id159_128 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DIE_ID4;

/* Define the union U_SC_DIE_ID5 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    die_id191_160 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DIE_ID5;

/* Define the union U_SC_DIE_ID6 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    die_id223_192 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DIE_ID6;

/* Define the union U_SC_DIE_ID7 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    die_id255_224 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DIE_ID7;

/* Define the union U_SC_DJTAG_RD_DATA0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    djtag_rd_data0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_RD_DATA0;

/* Define the union U_SC_DJTAG_RD_DATA1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    djtag_rd_data1 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_RD_DATA1;

/* Define the union U_SC_DJTAG_RD_DATA2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    djtag_rd_data2 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_RD_DATA2;

/* Define the union U_SC_DJTAG_RD_DATA3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    djtag_rd_data3 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_RD_DATA3;

/* Define the union U_SC_DJTAG_RD_DATA4 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    djtag_rd_data4 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_RD_DATA4;

/* Define the union U_SC_DJTAG_RD_DATA5 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    djtag_rd_data5 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_RD_DATA5;

/* Define the union U_SC_DJTAG_RD_DATA6 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    djtag_rd_data6 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_RD_DATA6;

/* Define the union U_SC_DJTAG_RD_DATA7 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    djtag_rd_data7 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_RD_DATA7;

/* Define the union U_SC_DJTAG_RD_DATA8 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    djtag_rd_data8 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_RD_DATA8;

/* Define the union U_SC_DJTAG_RD_DATA9 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    djtag_rd_data9 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_RD_DATA9;

/* Define the union U_SC_DJTAG_OP_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_491       : 6  ; /* [31:26] */
        unsigned int    rdata_changed : 10  ; /* [25:16] */
        unsigned int    rsv_492       : 6  ; /* [15:10] */
        unsigned int    debug_bus_en  : 1  ; /* [9] */
        unsigned int    djtag_op_done : 1  ; /* [8] */
        unsigned int    unit_conflict : 8  ; /* [7:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_DJTAG_OP_ST;

/* Define the union U_SC_USB3_ST3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    usb3_debug_31_0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_ST3;

/* Define the union U_SC_USB3_ST4 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    usb3_debug_63_32 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_ST4;

/* Define the union U_SC_USB3_ST6 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    usb3_logic_analyzer_trace_31_0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_ST6;

/* Define the union U_SC_USB3_ST7 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    usb3_logic_analyzer_trace_63_32 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_ST7;

/* Define the union U_SC_USB3_PHY_ST0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_493         : 13  ; /* [31:19] */
        unsigned int    avalid0         : 1  ; /* [18] */
        unsigned int    chgdet0         : 1  ; /* [17] */
        unsigned int    dmsehv0         : 1  ; /* [16] */
        unsigned int    dpsehv0         : 1  ; /* [15] */
        unsigned int    fslsrcv0        : 1  ; /* [14] */
        unsigned int    fsvminus0       : 1  ; /* [13] */
        unsigned int    fsvplus0        : 1  ; /* [12] */
        unsigned int    hostdisconnect0 : 1  ; /* [11] */
        unsigned int    hsrxdat0        : 1  ; /* [10] */
        unsigned int    hssquelch0      : 1  ; /* [9] */
        unsigned int    idhv0           : 1  ; /* [8] */
        unsigned int    otgsessvld0     : 1  ; /* [7] */
        unsigned int    otgsessvldhv0   : 1  ; /* [6] */
        unsigned int    vbusvalid0      : 1  ; /* [5] */
        unsigned int    phyclock0       : 1  ; /* [4] */
        unsigned int    rsv_494         : 1  ; /* [3] */
        unsigned int    rsv_495         : 1  ; /* [2] */
        unsigned int    rsv_496         : 1  ; /* [1] */
        unsigned int    rsv_497         : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_USB3_PHY_ST0;

/* Define the union U_SC_NORESET_0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_noreset_0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_NORESET_0;

/* Define the union U_SC_NORESET_1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_noreset_1 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_NORESET_1;

/* Define the union U_SC_NORESET_2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_noreset_2 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_NORESET_2;

/* Define the union U_SC_NORESET_3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_noreset_3 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_NORESET_3;

/* Define the union U_SC_NORESET_4 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_noreset_4 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_NORESET_4;

/* Define the union U_SC_NORESET_5 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_noreset_5 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_NORESET_5;

/* Define the union U_SC_NORESET_6 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_noreset_6 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_NORESET_6;

/* Define the union U_SC_NORESET_7 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_noreset_7 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_NORESET_7;

/* Define the union U_SC_NORESET_8 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_noreset_8 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_NORESET_8;

/* Define the union U_SC_NORESET_9 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_noreset_9 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_NORESET_9;

/* Define the union U_SC_NORESET_10 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_noreset_10 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_NORESET_10;

/* Define the union U_SC_NORESET_11 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_noreset_11 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_NORESET_11;

/* Define the union U_SC_NORESET_12 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_noreset_12 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_NORESET_12;

/* Define the union U_SC_NORESET_13 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_noreset_13 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_NORESET_13;

/* Define the union U_SC_NORESET_14 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_noreset_14 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_NORESET_14;

/* Define the union U_SC_NORESET_15 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_noreset_15 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_NORESET_15;

/* Define the union U_SC_SYSCTRL_LOCK */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sysctrl_lock : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SYSCTRL_LOCK;

/* Define the union U_SC_SYSCTRL_UNLOCK */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sysctrl_unlock : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SYSCTRL_UNLOCK;

/* Define the union U_SC_PROBE_MUX_SEL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_498       : 29  ; /* [31:3] */
        unsigned int    probe_mux_sel : 3  ; /* [2:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_PROBE_MUX_SEL;

/* Define the union U_SC_ECO_RSV0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    eco_rsv0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ECO_RSV0;

/* Define the union U_SC_ECO_RSV1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    eco_rsv1 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ECO_RSV1;

/* Define the union U_SC_ECO_RSV2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    eco_rsv2 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ECO_RSV2;

/* Define the union U_SC_ECO_RSV3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    eco_rsv3 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ECO_RSV3;

/* Define the union U_SC_ECO_RSV4 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    prototype_clk : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ECO_RSV4;

/* Define the union U_SC_ECO_RSV5 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    prototype_rst_n : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ECO_RSV5;

/* Define the union U_SC_SOFT_POR_RSV0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_soft_por_rsv0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SOFT_POR_RSV0;

/* Define the union U_SC_SOFT_POR_RSV1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_soft_por_rsv1 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SOFT_POR_RSV1;

/* Define the union U_SC_SOFT_POR_RSV2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_soft_por_rsv2 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SOFT_POR_RSV2;

/* Define the union U_SC_SOFT_POR_RSV3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_soft_por_rsv3 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SOFT_POR_RSV3;

/* Define the union U_SC_MONITOR_TEST0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_monitor_test0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MONITOR_TEST0;

/* Define the union U_SC_MONITOR_TEST1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_monitor_test1 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MONITOR_TEST1;

/* Define the union U_SC_VER_VER */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sc_ver_num : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_VER_VER;


//==============================================================================
/* Define the global struct */
typedef struct
{
    volatile U_SC_PLL0FCTRL                   SC_PLL0FCTRL                   ; /* 0 */
    volatile U_SC_PLL0FCTRL_FRAC              SC_PLL0FCTRL_FRAC              ; /* 4 */
    volatile U_SC_PLL1FCTRL                   SC_PLL1FCTRL                   ; /* 10 */
    volatile U_SC_PLL1FCTRL_FRAC              SC_PLL1FCTRL_FRAC              ; /* 14 */
    volatile U_SC_PLL2FCTRL                   SC_PLL2FCTRL                   ; /* 20 */
    volatile U_SC_PLL2FCTRL_FRAC              SC_PLL2FCTRL_FRAC              ; /* 24 */
    volatile U_SC_PLL3FCTRL                   SC_PLL3FCTRL                   ; /* 30 */
    volatile U_SC_PLL3FCTRL_FRAC              SC_PLL3FCTRL_FRAC              ; /* 34 */
    volatile U_SC_PLL4FCTRL                   SC_PLL4FCTRL                   ; /* 38 */
    volatile U_SC_PLL4FCTRL_FRAC              SC_PLL4FCTRL_FRAC              ; /* 3C */
    volatile U_SC_PLL5FCTRL                   SC_PLL5FCTRL                   ; /* 40 */
    volatile U_SC_PLL5FCTRL_FRAC              SC_PLL5FCTRL_FRAC              ; /* 44 */
    volatile U_SC_PLL_CLK_BYPASS0             SC_PLL_CLK_BYPASS0             ; /* A0 */
    volatile U_SC_PLL_CLK_BYPASS1             SC_PLL_CLK_BYPASS1             ; /* A4 */
    volatile U_SC_PLLCTRL                     SC_PLLCTRL                     ; /* B0 */
    volatile U_SC_SYSMODE_CTRL                SC_SYSMODE_CTRL                ; /* B4 */
    volatile U_SC_HPM_CLK_SEL                 SC_HPM_CLK_SEL                 ; /* 104 */
    volatile U_SC_MBIST_CPUI_CLK_SEL          SC_MBIST_CPUI_CLK_SEL          ; /* 108 */
    volatile U_SC_PLL0_OUT_CLK_SEL            SC_PLL0_OUT_CLK_SEL            ; /* 118 */
    volatile U_SC_ALL_SCAN_CTRL               SC_ALL_SCAN_CTRL               ; /* 150 */
    volatile U_SC_SYSSOFTRST_CTRL             SC_SYSSOFTRST_CTRL             ; /* 200 */
    volatile U_SC_PORN_ENABLE                 SC_PORN_ENABLE                 ; /* 220 */
    volatile U_SC_SDMA_CLK_EN                 SC_SDMA_CLK_EN                 ; /* 300 */
    volatile U_SC_SDMA_CLK_DIS                SC_SDMA_CLK_DIS                ; /* 304 */
    volatile U_SC_FTE_CLK_EN                  SC_FTE_CLK_EN                  ; /* 308 */
    volatile U_SC_FTE_CLK_DIS                 SC_FTE_CLK_DIS                 ; /* 30C */
    volatile U_SC_SMMU_CLK_EN                 SC_SMMU_CLK_EN                 ; /* 310 */
    volatile U_SC_SMMU_CLK_DIS                SC_SMMU_CLK_DIS                ; /* 314 */
    volatile U_SC_RGMII_CLK_EN                SC_RGMII_CLK_EN                ; /* 318 */
    volatile U_SC_RGMII_CLK_DIS               SC_RGMII_CLK_DIS               ; /* 31C */
    volatile U_SC_USB_CLK_EN                  SC_USB_CLK_EN                  ; /* 320 */
    volatile U_SC_USB_CLK_DIS                 SC_USB_CLK_DIS                 ; /* 324 */
    volatile U_SC_SYC_COUNTER_CLK_EN          SC_SYC_COUNTER_CLK_EN          ; /* 328 */
    volatile U_SC_SYS_COUNTER_CLK_DIS         SC_SYS_COUNTER_CLK_DIS         ; /* 32C */
    volatile U_SC_DDR_CLK_EN                  SC_DDR_CLK_EN                  ; /* 338 */
    volatile U_SC_DDR_CLK_DIS                 SC_DDR_CLK_DIS                 ; /* 33C */
    volatile U_SC_HHA_CLK_EN                  SC_HHA_CLK_EN                  ; /* 340 */
    volatile U_SC_HHA_CLK_DIS                 SC_HHA_CLK_DIS                 ; /* 344 */
    volatile U_SC_MN_CLK_EN                   SC_MN_CLK_EN                   ; /* 348 */
    volatile U_SC_MN_CLK_DIS                  SC_MN_CLK_DIS                  ; /* 34C */
    volatile U_SC_DDR_EXMBITST_CLK_EN         SC_DDR_EXMBITST_CLK_EN         ; /* 350 */
    volatile U_SC_DDR_EXMBITST_CLK_DIS        SC_DDR_EXMBITST_CLK_DIS        ; /* 354 */
    volatile U_SC_DDR_APB_CLK_EN              SC_DDR_APB_CLK_EN              ; /* 360 */
    volatile U_SC_DDR_APB_CLK_DIS             SC_DDR_APB_CLK_DIS             ; /* 364 */
    volatile U_SC_PROBE_CLK_EN                SC_PROBE_CLK_EN                ; /* 480 */
    volatile U_SC_PROBE_CLK_DIS               SC_PROBE_CLK_DIS               ; /* 484 */
    volatile U_SC_LLC_CLK_EN                  SC_LLC_CLK_EN                  ; /* 500 */
    volatile U_SC_LLC_CLK_DIS                 SC_LLC_CLK_DIS                 ; /* 504 */
    volatile U_SC_L2BUFF_CLK_EN               SC_L2BUFF_CLK_EN               ; /* 508 */
    volatile U_SC_L2BUFF_CLK_DIS              SC_L2BUFF_CLK_DIS              ; /* 50C */
    volatile U_SC_PCIE_CLK_EN                 SC_PCIE_CLK_EN                 ; /* 510 */
    volatile U_SC_PCIE_CLK_DIS                SC_PCIE_CLK_DIS                ; /* 514 */
    volatile U_SC_I2C_CLK_EN                  SC_I2C_CLK_EN                  ; /* 530 */
    volatile U_SC_I2C_CLK_DIS                 SC_I2C_CLK_DIS                 ; /* 534 */
    volatile U_SC_TIMER_CLK_EN                SC_TIMER_CLK_EN                ; /* 538 */
    volatile U_SC_TIMER_CLK_DIS               SC_TIMER_CLK_DIS               ; /* 53C */
    volatile U_SC_GPIO_CLK_EN                 SC_GPIO_CLK_EN                 ; /* 548 */
    volatile U_SC_GPIO_CLK_DIS                SC_GPIO_CLK_DIS                ; /* 54C */
    volatile U_SC_SFC_BUS_CLK_EN              SC_SFC_BUS_CLK_EN              ; /* 550 */
    volatile U_SC_SFC_BUS_CLK_DIS             SC_SFC_BUS_CLK_DIS             ; /* 554 */
    volatile U_SC_REF_CLK_EN                  SC_REF_CLK_EN                  ; /* 600 */
    volatile U_SC_REF_CLK_DIS                 SC_REF_CLK_DIS                 ; /* 604 */
    volatile U_SC_GPIO_DB_CLK_EN              SC_GPIO_DB_CLK_EN              ; /* 608 */
    volatile U_SC_GPIO_DB_CLK_DIS             SC_GPIO_DB_CLK_DIS             ; /* 60C */
    volatile U_SC_DJTAG_CLK_EN                SC_DJTAG_CLK_EN                ; /* 618 */
    volatile U_SC_DJTAG_CLK_DIS               SC_DJTAG_CLK_DIS               ; /* 61C */
    volatile U_SC_FUNC_MBIST_CLK_EN           SC_FUNC_MBIST_CLK_EN           ; /* 620 */
    volatile U_SC_FUNC_MBIST_CLK_DIS          SC_FUNC_MBIST_CLK_DIS          ; /* 624 */
    volatile U_SC_HPM_CLK_EN                  SC_HPM_CLK_EN                  ; /* 628 */
    volatile U_SC_HPM_CLK_DIS                 SC_HPM_CLK_DIS                 ; /* 62C */
    volatile U_SC_ULTRASOC_CLK_EN             SC_ULTRASOC_CLK_EN             ; /* 640 */
    volatile U_SC_ULTRASOC_CLK_DIS            SC_ULTRASOC_CLK_DIS            ; /* 644 */
    volatile U_SC_SPMI_CLK_EN                 SC_SPMI_CLK_EN                 ; /* 670 */
    volatile U_SC_SPMI_CLK_DIS                SC_SPMI_CLK_DIS                ; /* 674 */
    volatile U_SC_PWM_CLK_EN                  SC_PWM_CLK_EN                  ; /* 678 */
    volatile U_SC_PWM_CLK_DIS                 SC_PWM_CLK_DIS                 ; /* 67C */
    volatile U_SC_TIMERSTAMP_CLK_EN           SC_TIMERSTAMP_CLK_EN           ; /* 680 */
    volatile U_SC_TIMESTAMP_CLK_DIS           SC_TIMESTAMP_CLK_DIS           ; /* 684 */
    volatile U_SC_L2BUFF_MBIST_CLK_EN         SC_L2BUFF_MBIST_CLK_EN         ; /* 6A0 */
    volatile U_SC_L2BUFF_MBIST_CLK_DIS        SC_L2BUFF_MBIST_CLK_DIS        ; /* 6A4 */
    volatile U_SC_SRC_AI_CLK_EN               SC_SRC_AI_CLK_EN               ; /* 6A8 */
    volatile U_SC_SRC_AI_CLK_DIS              SC_SRC_AI_CLK_DIS              ; /* 6AC */
    volatile U_SC_GIC_CPU_CLK_EN              SC_GIC_CPU_CLK_EN              ; /* 6B0 */
    volatile U_SC_GIC_CPU_CLK_DIS             SC_GIC_CPU_CLK_DIS             ; /* 6B4 */
    volatile U_SC_CRS_CLK_EN                  SC_CRS_CLK_EN                  ; /* 6B8 */
    volatile U_SC_CRS_CLK_DIS                 SC_CRS_CLK_DIS                 ; /* 6BC */
    volatile U_SC_SDMAM_RESET_REQ             SC_SDMAM_RESET_REQ             ; /* A00 */
    volatile U_SC_SDMA_RESET_DREQ             SC_SDMA_RESET_DREQ             ; /* A04 */
    volatile U_SC_FTE_RESET_REQ               SC_FTE_RESET_REQ               ; /* A08 */
    volatile U_SC_FTE_RESET_DREQ              SC_FTE_RESET_DREQ              ; /* A0C */
    volatile U_SC_USB_RESET_REQ               SC_USB_RESET_REQ               ; /* A10 */
    volatile U_SC_USB_RESET_DREQ              SC_USB_RESET_DREQ              ; /* A14 */
    volatile U_SC_MII_RESET_REQ               SC_MII_RESET_REQ               ; /* A18 */
    volatile U_SC_MII_RESET_DREQ              SC_MII_RESET_DREQ              ; /* A1C */
    volatile U_SC_SYS_COUNTERM_RESET_REQ      SC_SYS_COUNTERM_RESET_REQ      ; /* A20 */
    volatile U_SC_SYS_COUNTER_RESET_DREQ      SC_SYS_COUNTER_RESET_DREQ      ; /* A24 */
    volatile U_SC_DDRC_RESET_REQ              SC_DDRC_RESET_REQ              ; /* A28 */
    volatile U_SC_DDRC_RESET_DREQ             SC_DDRC_RESET_DREQ             ; /* A2C */
    volatile U_SC_HHA_RESET_REQ               SC_HHA_RESET_REQ               ; /* A30 */
    volatile U_SC_HHA_RESET_DREQ              SC_HHA_RESET_DREQ              ; /* A34 */
    volatile U_SC_MN_RESET_REQ                SC_MN_RESET_REQ                ; /* A38 */
    volatile U_SC_MN_RESET_DREQ               SC_MN_RESET_DREQ               ; /* A3C */
    volatile U_SC_DDRC_EXMBIST_RESET_REQ      SC_DDRC_EXMBIST_RESET_REQ      ; /* A40 */
    volatile U_SC_DDRC_EXMBIST_RESET_DREQ     SC_DDRC_EXMBIST_RESET_DREQ     ; /* A44 */
    volatile U_SC_DDRC_PACK_RESET_REQ         SC_DDRC_PACK_RESET_REQ         ; /* A58 */
    volatile U_SC_DDRC_PACK_REGS_RESET_DREQ   SC_DDRC_PACK_REGS_RESET_DREQ   ; /* A5C */
    volatile U_SC_LLC_RESET_REQ               SC_LLC_RESET_REQ               ; /* B00 */
    volatile U_SC_LLC__REGS_RESET_DREQ        SC_LLC__REGS_RESET_DREQ        ; /* B04 */
    volatile U_SC_L2BUFF_RESET_REQ            SC_L2BUFF_RESET_REQ            ; /* B08 */
    volatile U_SC_L2BUFF__REGS_RESET_DREQ     SC_L2BUFF__REGS_RESET_DREQ     ; /* B0C */
    volatile U_SC_PCIE_RESET_REQ              SC_PCIE_RESET_REQ              ; /* B10 */
    volatile U_SC_PCIE__REGS_RESET_DREQ       SC_PCIE__REGS_RESET_DREQ       ; /* B14 */
    volatile U_SC_I2C_RESET_REQ               SC_I2C_RESET_REQ               ; /* B18 */
    volatile U_SC_I2C__REGS_RESET_DREQ        SC_I2C__REGS_RESET_DREQ        ; /* B1C */
    volatile U_SC_TIMER_RESET_REQ             SC_TIMER_RESET_REQ             ; /* B20 */
    volatile U_SC_TIMER__REGS_RESET_DREQ      SC_TIMER__REGS_RESET_DREQ      ; /* B24 */
    volatile U_SC_GPIO_RESET_REQ              SC_GPIO_RESET_REQ              ; /* B30 */
    volatile U_SC_GPIO__REGS_RESET_DREQ       SC_GPIO__REGS_RESET_DREQ       ; /* B34 */
    volatile U_SC_SPMI_RESET_REQ              SC_SPMI_RESET_REQ              ; /* B38 */
    volatile U_SC_SPMI__REGS_RESET_DREQ       SC_SPMI__REGS_RESET_DREQ       ; /* B3C */
    volatile U_SC_USB_UTMI_RESET_REQ          SC_USB_UTMI_RESET_REQ          ; /* B40 */
    volatile U_SC_USB_UTMI__REGS_RESET_DREQ   SC_USB_UTMI__REGS_RESET_DREQ   ; /* B44 */
    volatile U_SC_ULTRASOC_RESET_REQ          SC_ULTRASOC_RESET_REQ          ; /* B50 */
    volatile U_SC_ULTRASOC__REGS_RESET_DREQ   SC_ULTRASOC__REGS_RESET_DREQ   ; /* B54 */
    volatile U_SC_CPM_RESET_REQ               SC_CPM_RESET_REQ               ; /* B58 */
    volatile U_SC_CPM__REGS_RESET_DREQ        SC_CPM__REGS_RESET_DREQ        ; /* B5C */
    volatile U_SC_SVFD_RESET_REQ              SC_SVFD_RESET_REQ              ; /* B60 */
    volatile U_SC_SVFD__REGS_RESET_DREQ       SC_SVFD__REGS_RESET_DREQ       ; /* B64 */
    volatile U_SC_BISR_S_RESET_REQ            SC_BISR_S_RESET_REQ            ; /* B80 */
    volatile U_SC_BISR_S_RESET_DREQ           SC_BISR_S_RESET_DREQ           ; /* B84 */
    volatile U_SC_PWM_RESET_REQ               SC_PWM_RESET_REQ               ; /* B88 */
    volatile U_SC_PWM_RESET_DREQ              SC_PWM_RESET_DREQ              ; /* B8C */
    volatile U_SC_BISR_RESET_REQ              SC_BISR_RESET_REQ              ; /* B90 */
    volatile U_SC_BISR_RESET_DREQ             SC_BISR_RESET_DREQ             ; /* B94 */
    volatile U_SC_STATUS_RESET_REQ            SC_STATUS_RESET_REQ            ; /* C50 */
    volatile U_SC_STATUS_RESET_DREQ           SC_STATUS_RESET_DREQ           ; /* C54 */
    volatile U_SC_AICORE0_RESET_REQ           SC_AICORE0_RESET_REQ           ; /* C80 */
    volatile U_SC_AICORE0_RESET_DREQ          SC_AICORE0_RESET_DREQ          ; /* C84 */
    volatile U_SC_AICORE1_RESET_REQ           SC_AICORE1_RESET_REQ           ; /* C88 */
    volatile U_SC_AICORE1_RESET_DREQ          SC_AICORE1_RESET_DREQ          ; /* C8C */
    volatile U_SC_CPU_RESET_REQ               SC_CPU_RESET_REQ               ; /* C90 */
    volatile U_SC_CPU_RESET_DREQ              SC_CPU_RESET_DREQ              ; /* C94 */
    volatile U_SC_SFC_BUS_RESET_REQ           SC_SFC_BUS_RESET_REQ           ; /* CA0 */
    volatile U_SC_SFC_BUS_RESET_DREQ          SC_SFC_BUS_RESET_DREQ          ; /* CA4 */
    volatile U_SC_STAMP_RESET_REQ             SC_STAMP_RESET_REQ             ; /* CB0 */
    volatile U_SC_STAMP_RESET_DREQ            SC_STAMP_RESET_DREQ            ; /* CB4 */
    volatile U_SC_AICORE0_POWER_RESET_REQ     SC_AICORE0_POWER_RESET_REQ     ; /* CC0 */
    volatile U_SC_AICORE0_POWER_RESET_DREQ    SC_AICORE0_POWER_RESET_DREQ    ; /* CC4 */
    volatile U_SC_AICORE1_POWER_RESET_REQ     SC_AICORE1_POWER_RESET_REQ     ; /* CC8 */
    volatile U_SC_AICORE1_POWER_RESET_DREQ    SC_AICORE1_POWER_RESET_DREQ    ; /* CCC */
    volatile U_SC_CPU_POWER_RESET_REQ         SC_CPU_POWER_RESET_REQ         ; /* CD0 */
    volatile U_SC_CPU_POWER_RESET_DREQ        SC_CPU_POWER_RESET_DREQ        ; /* CD4 */
    volatile U_SC_DJTAG_RESET_REQ             SC_DJTAG_RESET_REQ             ; /* D18 */
    volatile U_SC_DJTAG_RESET_DREQ            SC_DJTAG_RESET_DREQ            ; /* D1C */
    volatile U_SC_FUNC_MBIST_RESET_REQ        SC_FUNC_MBIST_RESET_REQ        ; /* D20 */
    volatile U_SC_FUNC_MBIST_RESET_DREQ       SC_FUNC_MBIST_RESET_DREQ       ; /* D24 */
    volatile U_SC_HPM_RESET_REQ               SC_HPM_RESET_REQ               ; /* D28 */
    volatile U_SC_HPM_RESET_DREQ              SC_HPM_RESET_DREQ              ; /* D2C */
    volatile U_SC_BISR_REPAIR_RESET_REQ       SC_BISR_REPAIR_RESET_REQ       ; /* D38 */
    volatile U_SC_BISR_REPAIR_RESET_DREQ      SC_BISR_REPAIR_RESET_DREQ      ; /* D3C */
    volatile U_SC_PCIE_POWER_RESET_REQ        SC_PCIE_POWER_RESET_REQ        ; /* D40 */
    volatile U_SC_PCIE_POWER_RESET_DREQ       SC_PCIE_POWER_RESET_DREQ       ; /* D44 */
    volatile U_SC_I2C_CTRL_SET                SC_I2C_CTRL_SET                ; /* 2020 */
    volatile U_SC_I2C_CTRL_CLR                SC_I2C_CTRL_CLR                ; /* 2024 */
    volatile U_SC_DDR_RETENTION               SC_DDR_RETENTION               ; /* 2030 */
    volatile U_SC_DDR_RESET_ACK_CTRL          SC_DDR_RESET_ACK_CTRL          ; /* 2034 */
    volatile U_SC_ARM_JTAG_SEL                SC_ARM_JTAG_SEL                ; /* 2050 */
    volatile U_SC_DBGACK_EN                   SC_DBGACK_EN                   ; /* 2054 */
    volatile U_SC_DISPATCH_ERRRSP             SC_DISPATCH_ERRRSP             ; /* 2184 */
    volatile U_SC_SCH_S3_USER_CTRL0           SC_SCH_S3_USER_CTRL0           ; /* 23A0 */
    volatile U_SC_SCH_S3_USER_CTRL1           SC_SCH_S3_USER_CTRL1           ; /* 23A4 */
    volatile U_SC_SCH_S3_USER_CTRL2           SC_SCH_S3_USER_CTRL2           ; /* 23A8 */
    volatile U_SC_SCH_S3_USER_CTRL3           SC_SCH_S3_USER_CTRL3           ; /* 23B0 */
    volatile U_SC_SCH_S3_USER_CTRL4           SC_SCH_S3_USER_CTRL4           ; /* 23B4 */
    volatile U_SC_SCH_S3_USER_CTRL5           SC_SCH_S3_USER_CTRL5           ; /* 23B8 */
    volatile U_SC_AO_RESET_CTRL_DDR           SC_AO_RESET_CTRL_DDR           ; /* 2540 */
    volatile U_SC_DDR_MODE_CTRL               SC_DDR_MODE_CTRL               ; /* 2550 */
    volatile U_SC_TIMER_CLK_SEL               SC_TIMER_CLK_SEL               ; /* 2560 */
    volatile U_SC_WDG_CLK_SEL                 SC_WDG_CLK_SEL                 ; /* 2564 */
    volatile U_SC_SFC_CLK_SEL                 SC_SFC_CLK_SEL                 ; /* 2568 */
    volatile U_SC_TIMER_EN_EXTERNAL           SC_TIMER_EN_EXTERNAL           ; /* 256C */
    volatile U_SC_USB3_CTRL0                  SC_USB3_CTRL0                  ; /* 2580 */
    volatile U_SC_USB3_CTRL1                  SC_USB3_CTRL1                  ; /* 2584 */
    volatile U_SC_USB3_CTRL5                  SC_USB3_CTRL5                  ; /* 2594 */
    volatile U_SC_USB3_CTRL6                  SC_USB3_CTRL6                  ; /* 2598 */
    volatile U_SC_USB3_RAM_ECC_EN             SC_USB3_RAM_ECC_EN             ; /* 25B0 */
    volatile U_SC_USB3_RAM_ECC_CLR            SC_USB3_RAM_ECC_CLR            ; /* 25B4 */
    volatile U_SC_UTMI_CLK_SEL                SC_UTMI_CLK_SEL                ; /* 25C0 */
    volatile U_SC_M2_PAD_OE                   SC_M2_PAD_OE                   ; /* 25E0 */
    volatile U_SC_JTAG_AUTH_CTRL0             SC_JTAG_AUTH_CTRL0             ; /* 2600 */
    volatile U_SC_JTAG_AUTH_CTRL1             SC_JTAG_AUTH_CTRL1             ; /* 2604 */
    volatile U_SC_JTAG_AUTH_CTRL2             SC_JTAG_AUTH_CTRL2             ; /* 2608 */
    volatile U_SC_CFG_BW_CTRL                 SC_CFG_BW_CTRL                 ; /* 2620 */
    volatile U_SC_REPAIR_LOAD_RSTN            SC_REPAIR_LOAD_RSTN            ; /* 2640 */
    volatile U_SC_INT_WAKE_MASK               SC_INT_WAKE_MASK               ; /* 2660 */
    volatile U_SC_USB3_PHY_CFG0               SC_USB3_PHY_CFG0               ; /* 2700 */
    volatile U_SC_USB3_PHY_CFG1               SC_USB3_PHY_CFG1               ; /* 2704 */
    volatile U_SC_USB3_PHY_CFG2               SC_USB3_PHY_CFG2               ; /* 2708 */
    volatile U_SC_USB3_PHY_CFG3               SC_USB3_PHY_CFG3               ; /* 270C */
    volatile U_SC_USB3_PHY_CFG4               SC_USB3_PHY_CFG4               ; /* 2710 */
    volatile U_SC_USB3_PHY_CFG5               SC_USB3_PHY_CFG5               ; /* 2714 */
    volatile U_SC_USB3_PHY_CFG6               SC_USB3_PHY_CFG6               ; /* 2718 */
    volatile U_SC_USB3_PHY_CFG7               SC_USB3_PHY_CFG7               ; /* 271C */
    volatile U_SC_USB3_PHY_CFG8               SC_USB3_PHY_CFG8               ; /* 2720 */
    volatile U_SC_USB3_PHY_CFG9               SC_USB3_PHY_CFG9               ; /* 2724 */
    volatile U_SC_USB3_PHY_CFG10              SC_USB3_PHY_CFG10              ; /* 2728 */
    volatile U_SC_USB3_PHY_CFG11              SC_USB3_PHY_CFG11              ; /* 272C */
    volatile U_SC_USB3_PHY_CFG12              SC_USB3_PHY_CFG12              ; /* 2730 */
    volatile U_SC_PMURST_CTRL                 SC_PMURST_CTRL                 ; /* 2800 */
    volatile U_SC_RST_CTRL                    SC_RST_CTRL                    ; /* 2810 */
    volatile U_SC_WAIT_DDR_SELFREFLASH_BYPASS SC_WAIT_DDR_SELFREFLASH_BYPASS ; /* 2820 */
    volatile U_SC_MEM_CTRL_SP_SRAM            SC_MEM_CTRL_SP_SRAM            ; /* 3000 */
    volatile U_SC_MEM_CTRL_RGMII              SC_MEM_CTRL_RGMII              ; /* 3028 */
    volatile U_SC_MEM_CTRL_SMMU               SC_MEM_CTRL_SMMU               ; /* 302C */
    volatile U_SC_MEM_CTRL0_USB3              SC_MEM_CTRL0_USB3              ; /* 3030 */
    volatile U_SC_MEM_CTRL1_USB3              SC_MEM_CTRL1_USB3              ; /* 3034 */
    volatile U_SC_MEM_CTRL2_USB3              SC_MEM_CTRL2_USB3              ; /* 3038 */
    volatile U_SC_JTAG_AUTH_MEM_CTRL          SC_JTAG_AUTH_MEM_CTRL          ; /* 308C */
    volatile U_SC_BOOTROM_TIMING              SC_BOOTROM_TIMING              ; /* 3090 */
    volatile U_SC_RGMII_BYP_CTRL              SC_RGMII_BYP_CTRL              ; /* 3400 */
    volatile U_SC_BAK_DATA0                   SC_BAK_DATA0                   ; /* 3410 */
    volatile U_SC_BAK_DATA1                   SC_BAK_DATA1                   ; /* 3414 */
    volatile U_SC_BAK_DATA2                   SC_BAK_DATA2                   ; /* 3418 */
    volatile U_SC_BAK_DATA3                   SC_BAK_DATA3                   ; /* 341C */
    volatile U_SC_BAK_DATA4                   SC_BAK_DATA4                   ; /* 3420 */
    volatile U_SC_BAK_DATA5                   SC_BAK_DATA5                   ; /* 3424 */
    volatile U_SC_BAK_DATA6                   SC_BAK_DATA6                   ; /* 3428 */
    volatile U_SC_BAK_DATA7                   SC_BAK_DATA7                   ; /* 342C */
    volatile U_SC_BAK_DATA8                   SC_BAK_DATA8                   ; /* 3430 */
    volatile U_SC_BAK_DATA9                   SC_BAK_DATA9                   ; /* 3434 */
    volatile U_SC_BAK_DATA10                  SC_BAK_DATA10                  ; /* 3438 */
    volatile U_SC_BAK_DATA11                  SC_BAK_DATA11                  ; /* 343C */
    volatile U_SC_BAK_DATA12                  SC_BAK_DATA12                  ; /* 3440 */
    volatile U_SC_BAK_DATA13                  SC_BAK_DATA13                  ; /* 3444 */
    volatile U_SC_BAK_DATA14                  SC_BAK_DATA14                  ; /* 3448 */
    volatile U_SC_BAK_DATA15                  SC_BAK_DATA15                  ; /* 344C */
    volatile U_SC_MBIST_CPUI_ENABLE           SC_MBIST_CPUI_ENABLE           ; /* 3500 */
    volatile U_SC_MBIST_CPUI_DATAIN           SC_MBIST_CPUI_DATAIN           ; /* 3504 */
    volatile U_SC_MBIST_CPUI_WRITE_EN         SC_MBIST_CPUI_WRITE_EN         ; /* 3508 */
    volatile U_SC_MBIST_CPUI_SMS_FUNC_RESET   SC_MBIST_CPUI_SMS_FUNC_RESET   ; /* 350C */
    volatile U_SC_MBIST_CPUI_FUNC_RESET       SC_MBIST_CPUI_FUNC_RESET       ; /* 3510 */
    volatile U_SC_RGMII_WADDR_CTRL            SC_RGMII_WADDR_CTRL            ; /* 3514 */
    volatile U_SC_RGMII_RADDR_CTRL            SC_RGMII_RADDR_CTRL            ; /* 3518 */
    volatile U_SC_CFG_AWUSER_L_RGMII          SC_CFG_AWUSER_L_RGMII          ; /* 3520 */
    volatile U_SC_CFG_AWUSER_M_RGMII          SC_CFG_AWUSER_M_RGMII          ; /* 3524 */
    volatile U_SC_CFG_AWUSER_H_RGMII          SC_CFG_AWUSER_H_RGMII          ; /* 3528 */
    volatile U_SC_CFG_ARUSER_L_RGMII          SC_CFG_ARUSER_L_RGMII          ; /* 352C */
    volatile U_SC_CFG_ARUSER_M_RGMII          SC_CFG_ARUSER_M_RGMII          ; /* 3530 */
    volatile U_SC_CFG_ARUSER_H_RGMII          SC_CFG_ARUSER_H_RGMII          ; /* 3534 */
    volatile U_SC_CFG_QOS_CTRL_RGMII          SC_CFG_QOS_CTRL_RGMII          ; /* 3538 */
    volatile U_SC_CFG_QOS_OVERFLOW_EN         SC_CFG_QOS_OVERFLOW_EN         ; /* 3550 */
    volatile U_SC_CFG_QOS_BACKPRESSURE_EN     SC_CFG_QOS_BACKPRESSURE_EN     ; /* 3554 */
    volatile U_SC_CFG_QOS_BACKPRESSURE_VALID  SC_CFG_QOS_BACKPRESSURE_VALID  ; /* 3558 */
    volatile U_SC_CFG_QOS_EXTEND_CYCLE_NUM    SC_CFG_QOS_EXTEND_CYCLE_NUM    ; /* 355C */
    volatile U_SC_CFG_QOS_VALID_INDICATE      SC_CFG_QOS_VALID_INDICATE      ; /* 3560 */
    volatile U_SC_CFG_QOS_OVERFLOW_DDR        SC_CFG_QOS_OVERFLOW_DDR        ; /* 3564 */
    volatile U_SC_CFG_QOS_BACKPRESSURE_SEL    SC_CFG_QOS_BACKPRESSURE_SEL    ; /* 3568 */
    volatile U_SC_DDR_RETETION_CLR            SC_DDR_RETETION_CLR            ; /* 3580 */
    volatile U_SC_RST_SRC_CLR                 SC_RST_SRC_CLR                 ; /* 3590 */
    volatile U_SC_AI0_SVFD_CFG0               SC_AI0_SVFD_CFG0               ; /* 3600 */
    volatile U_SC_AI0_SVFD_CFG1               SC_AI0_SVFD_CFG1               ; /* 3604 */
    volatile U_SC_AI0_SVFD_CFG2               SC_AI0_SVFD_CFG2               ; /* 3608 */
    volatile U_SC_AI1_SVFD_CFG0               SC_AI1_SVFD_CFG0               ; /* 360C */
    volatile U_SC_AI1_SVFD_CFG1               SC_AI1_SVFD_CFG1               ; /* 3610 */
    volatile U_SC_AI1_SVFD_CFG2               SC_AI1_SVFD_CFG2               ; /* 3614 */
    volatile U_SC_AI0_SVFD_BYPASS             SC_AI0_SVFD_BYPASS             ; /* 3650 */
    volatile U_SC_AI1_SVFD_BYPASS             SC_AI1_SVFD_BYPASS             ; /* 3654 */
    volatile U_SC_CPU_CRG_CTRL                SC_CPU_CRG_CTRL                ; /* 3684 */
    volatile U_SC_PLL_PROF_CFG0               SC_PLL_PROF_CFG0               ; /* 3688 */
    volatile U_SC_CFG_USBCTRL_SEL             SC_CFG_USBCTRL_SEL             ; /* 368C */
    volatile U_SC_PLL_PROF_CFG1               SC_PLL_PROF_CFG1               ; /* 3690 */
    volatile U_SC_UTMI_WORD_IF                SC_UTMI_WORD_IF                ; /* 3750 */
    volatile U_SC_BIAS_CTRL                   SC_BIAS_CTRL                   ; /* 3780 */
    volatile U_SC_RGMII_SRC_INT               SC_RGMII_SRC_INT               ; /* 3800 */
    volatile U_SC_RGMII_INT_MASK              SC_RGMII_INT_MASK              ; /* 3804 */
    volatile U_SC_WDG_RST_MASK                SC_WDG_RST_MASK                ; /* 3900 */
    volatile U_SC_USB3_TRACE_CTRL             SC_USB3_TRACE_CTRL             ; /* 3950 */
    volatile U_SC_USB3_TRACE_DATA_31_0        SC_USB3_TRACE_DATA_31_0        ; /* 3954 */
    volatile U_SC_USB3_TRACE_DATA_63_32       SC_USB3_TRACE_DATA_63_32       ; /* 3958 */
    volatile U_SC_USB3_TRACE_DATA_95_64       SC_USB3_TRACE_DATA_95_64       ; /* 395C */
    volatile U_SC_USB3_TRACE_DATA_127_96      SC_USB3_TRACE_DATA_127_96      ; /* 3960 */
    volatile U_SC_USB3_TRACE_MASK_31_0        SC_USB3_TRACE_MASK_31_0        ; /* 3964 */
    volatile U_SC_USB3_TRACE_MASK_63_32       SC_USB3_TRACE_MASK_63_32       ; /* 3968 */
    volatile U_SC_USB3_TRACE_MASK_95_64       SC_USB3_TRACE_MASK_95_64       ; /* 396C */
    volatile U_SC_USB3_TRACE_MASK_127_96      SC_USB3_TRACE_MASK_127_96      ; /* 3970 */
    volatile U_SC_TSENSOR_INT_MASK            SC_TSENSOR_INT_MASK            ; /* 3A00 */
    volatile U_SC_TS_EN                       SC_TS_EN                       ; /* 3A30 */
    volatile U_SC_TIMESTAMP_CLK_SEL           SC_TIMESTAMP_CLK_SEL           ; /* 3A34 */
    volatile U_SC_SLV_EXT_ACTIVE              SC_SLV_EXT_ACTIVE              ; /* 3A50 */
    volatile U_SC_RING_LINK_REQ               SC_RING_LINK_REQ               ; /* 3A60 */
    volatile U_SC_TEMP_PERIOD_AIC             SC_TEMP_PERIOD_AIC             ; /* 3B00 */
    volatile U_SC_AXI_CACHE_USB               SC_AXI_CACHE_USB               ; /* 3B40 */
    volatile U_SC_BYPASS_CACHE_USB            SC_BYPASS_CACHE_USB            ; /* 3B44 */
    volatile U_SC_PLL_SRC_INT                 SC_PLL_SRC_INT                 ; /* 4000 */
    volatile U_SC_PLL_INT_MASK                SC_PLL_INT_MASK                ; /* 4004 */
    volatile U_SC_DJTAG_SRC_INT               SC_DJTAG_SRC_INT               ; /* 4008 */
    volatile U_SC_DJTAG_INT_MASK              SC_DJTAG_INT_MASK              ; /* 400C */
    volatile U_SC_XTAL_CTRL                   SC_XTAL_CTRL                   ; /* 4104 */
    volatile U_SC_ITCR                        SC_ITCR                        ; /* 4108 */
    volatile U_SC_ITIR0                       SC_ITIR0                       ; /* 410C */
    volatile U_SC_ITOR                        SC_ITOR                        ; /* 4110 */
    volatile U_SC_CNT_DATA_CFG                SC_CNT_DATA_CFG                ; /* 4114 */
    volatile U_SC_CNT_STEP_RSV_CFG            SC_CNT_STEP_RSV_CFG            ; /* 4118 */
    volatile U_SC_CNT_CTRL                    SC_CNT_CTRL                    ; /* 411C */
    volatile U_SC_IM_CTRL                     SC_IM_CTRL                     ; /* 4120 */
    volatile U_SC_IM_STAT                     SC_IM_STAT                     ; /* 4124 */
    volatile U_SC_PROBE_SYSTEM_COUNTER_VALUE  SC_PROBE_SYSTEM_COUNTER_VALUE  ; /* 4580 */
    volatile U_SC_PROBE_SYSTEM_COUNTER_EN     SC_PROBE_SYSTEM_COUNTER_EN     ; /* 4584 */
    volatile U_SC_PLL_LOCK_STATUS             SC_PLL_LOCK_STATUS             ; /* 5000 */
    volatile U_SC_PLLCTRL_ST                  SC_PLLCTRL_ST                  ; /* 5004 */
    volatile U_SC_DDRC_WARM_RST_ACKED         SC_DDRC_WARM_RST_ACKED         ; /* 5200 */
    volatile U_SC_DDRC_IO_RESET_STATE         SC_DDRC_IO_RESET_STATE         ; /* 5204 */
    volatile U_SC_SDMA_CLK_ST                 SC_SDMA_CLK_ST                 ; /* 5300 */
    volatile U_SC_FTE_CLK_ST                  SC_FTE_CLK_ST                  ; /* 5308 */
    volatile U_SC_SMMU_CLK_ST                 SC_SMMU_CLK_ST                 ; /* 5310 */
    volatile U_SC_MII_CLK_ST                  SC_MII_CLK_ST                  ; /* 5318 */
    volatile U_SC_USB_CLK_ST                  SC_USB_CLK_ST                  ; /* 5320 */
    volatile U_SC_SYS_COUNTER_CLK_ST          SC_SYS_COUNTER_CLK_ST          ; /* 5328 */
    volatile U_SC_DDR_CLK_ST                  SC_DDR_CLK_ST                  ; /* 5338 */
    volatile U_SC_HHA_CLK_ST                  SC_HHA_CLK_ST                  ; /* 5340 */
    volatile U_SC_MN_CLK_ST                   SC_MN_CLK_ST                   ; /* 5348 */
    volatile U_SC_DDR_EXMBIST_CLK_ST          SC_DDR_EXMBIST_CLK_ST          ; /* 5350 */
    volatile U_SC_DDR_APB_CLK_ST              SC_DDR_APB_CLK_ST              ; /* 5360 */
    volatile U_SC_PROBE_CLK_ST                SC_PROBE_CLK_ST                ; /* 5480 */
    volatile U_SC_LLC_CLK_ST                  SC_LLC_CLK_ST                  ; /* 5500 */
    volatile U_SC_L2BUFF_CLK_ST               SC_L2BUFF_CLK_ST               ; /* 5508 */
    volatile U_SC_PCIE_CLK_ST                 SC_PCIE_CLK_ST                 ; /* 5510 */
    volatile U_SC_I2C_CLK_ST                  SC_I2C_CLK_ST                  ; /* 5530 */
    volatile U_SC_TIMER_CLK_ST                SC_TIMER_CLK_ST                ; /* 5538 */
    volatile U_SC_GPIO_CLK_ST                 SC_GPIO_CLK_ST                 ; /* 5548 */
    volatile U_SC_SFC_BUS_CLK_ST              SC_SFC_BUS_CLK_ST              ; /* 5550 */
    volatile U_SC_REF_CLK_ST                  SC_REF_CLK_ST                  ; /* 5600 */
    volatile U_SC_GPIO_DB_CLK_ST              SC_GPIO_DB_CLK_ST              ; /* 5608 */
    volatile U_SC_DJTAG_CLK_ST                SC_DJTAG_CLK_ST                ; /* 5618 */
    volatile U_SC_FUNC_MBIST_CLK_ST           SC_FUNC_MBIST_CLK_ST           ; /* 5620 */
    volatile U_SC_HPM_CLK_ST                  SC_HPM_CLK_ST                  ; /* 5628 */
    volatile U_SC_ULTRASOC_CLK_ST             SC_ULTRASOC_CLK_ST             ; /* 5640 */
    volatile U_SC_SPMI_CLK_ST                 SC_SPMI_CLK_ST                 ; /* 5670 */
    volatile U_SC_PWM_CLK_ST                  SC_PWM_CLK_ST                  ; /* 5678 */
    volatile U_SC_TIMESTAMP_CLK_ST            SC_TIMESTAMP_CLK_ST            ; /* 5680 */
    volatile U_SC_L2BUFF_MBIST_CLK_ST         SC_L2BUFF_MBIST_CLK_ST         ; /* 56A0 */
    volatile U_SC_SRC_AI_CLK_ST               SC_SRC_AI_CLK_ST               ; /* 56A8 */
    volatile U_SC_GIC_CPU_CLK_ST              SC_GIC_CPU_CLK_ST              ; /* 56B0 */
    volatile U_SC_CRS_CLK_ST                  SC_CRS_CLK_ST                  ; /* 56B8 */
    volatile U_SC_SDMA_RESET_ST               SC_SDMA_RESET_ST               ; /* 5A00 */
    volatile U_SC_FTE_RESET_ST                SC_FTE_RESET_ST                ; /* 5A08 */
    volatile U_SC_USB_RESET_ST                SC_USB_RESET_ST                ; /* 5A10 */
    volatile U_SC_MII_RESET_ST                SC_MII_RESET_ST                ; /* 5A18 */
    volatile U_SC_SYS_COUNTER_RESET_ST        SC_SYS_COUNTER_RESET_ST        ; /* 5A20 */
    volatile U_SC_DDRC_RESET_ST               SC_DDRC_RESET_ST               ; /* 5A28 */
    volatile U_SC_HHA_RESET_ST                SC_HHA_RESET_ST                ; /* 5A30 */
    volatile U_SC_MN_RESET_ST                 SC_MN_RESET_ST                 ; /* 5A38 */
    volatile U_SC_DDRC_EXMBIST_RESET_ST       SC_DDRC_EXMBIST_RESET_ST       ; /* 5A40 */
    volatile U_SC_DDRC_PACK_RESET_ST          SC_DDRC_PACK_RESET_ST          ; /* 5A58 */
    volatile U_SC_LLC_REGS_RESET_ST           SC_LLC_REGS_RESET_ST           ; /* 5B00 */
    volatile U_SC_L2BUFF_REGS_RESET_ST        SC_L2BUFF_REGS_RESET_ST        ; /* 5B08 */
    volatile U_SC_PCIE_REGS_RESET_ST          SC_PCIE_REGS_RESET_ST          ; /* 5B10 */
    volatile U_SC_I2C_REGS_RESET_ST           SC_I2C_REGS_RESET_ST           ; /* 5B18 */
    volatile U_SC_TIMER_REGS_RESET_ST         SC_TIMER_REGS_RESET_ST         ; /* 5B20 */
    volatile U_SC_GPIO_REGS_RESET_ST          SC_GPIO_REGS_RESET_ST          ; /* 5B30 */
    volatile U_SC_SPMI_REGS_RESET_ST          SC_SPMI_REGS_RESET_ST          ; /* 5B38 */
    volatile U_SC_USB_UTMI_REGS_RESET_ST      SC_USB_UTMI_REGS_RESET_ST      ; /* 5B40 */
    volatile U_SC_ULTRASOC_REGS_RESET_ST      SC_ULTRASOC_REGS_RESET_ST      ; /* 5B50 */
    volatile U_SC_CPM_REGS_RESET_ST           SC_CPM_REGS_RESET_ST           ; /* 5B58 */
    volatile U_SC_SVFD_REGS_RESET_ST          SC_SVFD_REGS_RESET_ST          ; /* 5B60 */
    volatile U_SC_BISR_S_RESET_ST             SC_BISR_S_RESET_ST             ; /* 5B80 */
    volatile U_SC_PWM_RESET_ST                SC_PWM_RESET_ST                ; /* 5B88 */
    volatile U_SC_BISR_RESET_ST               SC_BISR_RESET_ST               ; /* 5B90 */
    volatile U_SC_STATUS_TRESET_ST            SC_STATUS_TRESET_ST            ; /* 5C50 */
    volatile U_SC_AICORE0_RESET_ST            SC_AICORE0_RESET_ST            ; /* 5C80 */
    volatile U_SC_AICORE1_RESET_ST            SC_AICORE1_RESET_ST            ; /* 5C88 */
    volatile U_SC_CPU_RESET_ST                SC_CPU_RESET_ST                ; /* 5C90 */
    volatile U_SC_SFC_BUS_RESET_ST            SC_SFC_BUS_RESET_ST            ; /* 5CA0 */
    volatile U_SC_STAMP_RESET_ST              SC_STAMP_RESET_ST              ; /* 5CB0 */
    volatile U_SC_AICORE0_POWER_RESET_ST      SC_AICORE0_POWER_RESET_ST      ; /* 5CC0 */
    volatile U_SC_AICORE1_POWER_RESET_ST      SC_AICORE1_POWER_RESET_ST      ; /* 5CC8 */
    volatile U_SC_CPU_POWER_RESET_ST          SC_CPU_POWER_RESET_ST          ; /* 5CD0 */
    volatile U_SC_DJTAG_RESET_ST              SC_DJTAG_RESET_ST              ; /* 5D18 */
    volatile U_SC_FUNC_MBIST_RESET_ST         SC_FUNC_MBIST_RESET_ST         ; /* 5D20 */
    volatile U_SC_HPM_RESET_ST                SC_HPM_RESET_ST                ; /* 5D28 */
    volatile U_SC_BISR_REPAIR_RESET_ST        SC_BISR_REPAIR_RESET_ST        ; /* 5D38 */
    volatile U_SC_PCIE_POWER_RESET_ST         SC_PCIE_POWER_RESET_ST         ; /* 5D40 */
    volatile U_SC_I2C_CTRL_ST                 SC_I2C_CTRL_ST                 ; /* 6020 */
    volatile U_SC_DCIP_ST2                    SC_DCIP_ST2                    ; /* 60E4 */
    volatile U_SC_JTAG_AUTH_ST0               SC_JTAG_AUTH_ST0               ; /* 6150 */
    volatile U_SC_JTAG_AUTH_ST1               SC_JTAG_AUTH_ST1               ; /* 6154 */
    volatile U_SC_JTAG_AUTH_STAT              SC_JTAG_AUTH_STAT              ; /* 6158 */
    volatile U_SC_UCE_PROG_ST_DDR1            SC_UCE_PROG_ST_DDR1            ; /* 6184 */
    volatile U_SC_PMUDESC00_ECC_ST            SC_PMUDESC00_ECC_ST            ; /* 6200 */
    volatile U_SC_PMUDESC01_ECC_ST            SC_PMUDESC01_ECC_ST            ; /* 6204 */
    volatile U_SC_PMUDESC02_ECC_ST            SC_PMUDESC02_ECC_ST            ; /* 6208 */
    volatile U_SC_PMUDESC03_ECC_ST            SC_PMUDESC03_ECC_ST            ; /* 620C */
    volatile U_SC_PMURX0_ECC_ST0              SC_PMURX0_ECC_ST0              ; /* 6210 */
    volatile U_SC_PMURX0_ECC_ST1              SC_PMURX0_ECC_ST1              ; /* 6214 */
    volatile U_SC_PMUTX0_ECC_ST0              SC_PMUTX0_ECC_ST0              ; /* 6218 */
    volatile U_SC_PMUTX0_ECC_ST1              SC_PMUTX0_ECC_ST1              ; /* 621C */
    volatile U_SC_MACDIO0_ECC_ST              SC_MACDIO0_ECC_ST              ; /* 6220 */
    volatile U_SC_CORERX0_ECC_ST              SC_CORERX0_ECC_ST              ; /* 6224 */
    volatile U_SC_CORETX0_ECC_ST              SC_CORETX0_ECC_ST              ; /* 6228 */
    volatile U_SC_WROPT_ECC_ST                SC_WROPT_ECC_ST                ; /* 622C */
    volatile U_SC_RDOPT_ECC_ST                SC_RDOPT_ECC_ST                ; /* 6230 */
    volatile U_SC_GMIIRX0_ECC_ST              SC_GMIIRX0_ECC_ST              ; /* 6234 */
    volatile U_SC_USB_RAM0_ECC_ST             SC_USB_RAM0_ECC_ST             ; /* 6250 */
    volatile U_SC_USB_RAM1_ECC_ST             SC_USB_RAM1_ECC_ST             ; /* 6254 */
    volatile U_SC_USB_RAM2_ECC_ST             SC_USB_RAM2_ECC_ST             ; /* 6258 */
    volatile U_SC_USB_RAM3_ECC_ST             SC_USB_RAM3_ECC_ST             ; /* 625C */
    volatile U_SC_USB3_TRACE_ST               SC_USB3_TRACE_ST               ; /* 6260 */
    volatile U_SC_USB3_TRACE_RDATA_31_0       SC_USB3_TRACE_RDATA_31_0       ; /* 6264 */
    volatile U_SC_USB3_TRACE_RDATA_63_32      SC_USB3_TRACE_RDATA_63_32      ; /* 6268 */
    volatile U_SC_USB3_TRACE_RDATA_95_64      SC_USB3_TRACE_RDATA_95_64      ; /* 626C */
    volatile U_SC_USB3_TRACE_RDATA_127_96     SC_USB3_TRACE_RDATA_127_96     ; /* 6270 */
    volatile U_SC_RING_LINK_ACK               SC_RING_LINK_ACK               ; /* 6300 */
    volatile U_SC_CPU_IDLE_DIV_STAT           SC_CPU_IDLE_DIV_STAT           ; /* 6304 */
    volatile U_SC_DRAM_RETENTION_ST           SC_DRAM_RETENTION_ST           ; /* 6320 */
    volatile U_SC_AI0_SVFD_ST0                SC_AI0_SVFD_ST0                ; /* 6600 */
    volatile U_SC_AI0_SVFD_ST1                SC_AI0_SVFD_ST1                ; /* 6604 */
    volatile U_SC_AI1_SVFD_ST0                SC_AI1_SVFD_ST0                ; /* 6608 */
    volatile U_SC_AI1_SVFD_ST1                SC_AI1_SVFD_ST1                ; /* 660C */
    volatile U_SC_RST_SRC                     SC_RST_SRC                     ; /* 6700 */
    volatile U_SC_RST_SRC_FLAG                SC_RST_SRC_FLAG                ; /* 6708 */
    volatile U_SC_MBIST_CPUI_DATAOUT          SC_MBIST_CPUI_DATAOUT          ; /* 7500 */
    volatile U_SC_RGMII_INT_STATUS            SC_RGMII_INT_STATUS            ; /* 7600 */
    volatile U_SC_PLL_INT_STATUS              SC_PLL_INT_STATUS              ; /* 8000 */
    volatile U_SC_DJTAG_INT_STATUS            SC_DJTAG_INT_STATUS            ; /* 8008 */
    volatile U_SC_TSENSOR_INT_STATUS          SC_TSENSOR_INT_STATUS          ; /* 8010 */
    volatile U_SC_XTAL_ST                     SC_XTAL_ST                     ; /* 8104 */
    volatile U_SC_CNT_ST                      SC_CNT_ST                      ; /* 8108 */
    volatile U_SC_ITIR0_TEST                  SC_ITIR0_TEST                  ; /* 810C */
    volatile U_SC_ITOR_TEST                   SC_ITOR_TEST                   ; /* 8110 */
    volatile U_SC_CNT_DATA                    SC_CNT_DATA                    ; /* 8114 */
    volatile U_SYS_SLEEP_CFG                  SYS_SLEEP_CFG                  ; /* 9000 */
    volatile U_SYS_SLEEP_STATE                SYS_SLEEP_STATE                ; /* 9004 */
    volatile U_SYS_TCXO_CTRL_CFG              SYS_TCXO_CTRL_CFG              ; /* 9008 */
    volatile U_SYS_TCXO0_TIMEOUT              SYS_TCXO0_TIMEOUT              ; /* 900C */
    volatile U_SYS_TCXO1_TIEOUT               SYS_TCXO1_TIEOUT               ; /* 9010 */
    volatile U_SYS_TCXO_CTRL_STATE            SYS_TCXO_CTRL_STATE            ; /* 9014 */
    volatile U_SYS_PWRDN_TIME                 SYS_PWRDN_TIME                 ; /* 9018 */
    volatile U_SYS_PWRUP_TIME                 SYS_PWRUP_TIME                 ; /* 901C */
    volatile U_SYS_PWR_CTRL_CFG               SYS_PWR_CTRL_CFG               ; /* 9020 */
    volatile U_SC_MDCTRL                      SC_MDCTRL                      ; /* 9030 */
    volatile U_SC_SLEEP                       SC_SLEEP                       ; /* 9034 */
    volatile U_SC_DEEPSLEEP                   SC_DEEPSLEEP                   ; /* 9038 */
    volatile U_SC_DJTAG_SEC_ACC_EN            SC_DJTAG_SEC_ACC_EN            ; /* D800 */
    volatile U_SC_DJTAG_MSTR_ADDR             SC_DJTAG_MSTR_ADDR             ; /* D810 */
    volatile U_SC_DJTAG_MSTR_DATA             SC_DJTAG_MSTR_DATA             ; /* D814 */
    volatile U_SC_DJTAG_MSTR_CFG              SC_DJTAG_MSTR_CFG              ; /* D818 */
    volatile U_SC_DJTAG_MSTR_START_EN         SC_DJTAG_MSTR_START_EN         ; /* D81C */
    volatile U_SC_DJTAG_MSTR_PIPE_CFG         SC_DJTAG_MSTR_PIPE_CFG         ; /* D820 */
    volatile U_SC_DJTAG_TMOUT                 SC_DJTAG_TMOUT                 ; /* D840 */
    volatile U_SC_EFUSE_SECURE_INFO           SC_EFUSE_SECURE_INFO           ; /* E000 */
    volatile U_SC_EFUSE_SECURE_INF_AO         SC_EFUSE_SECURE_INF_AO         ; /* E040 */
    volatile U_SC_EFUSE_NS_FORBID             SC_EFUSE_NS_FORBID             ; /* E044 */
    volatile U_SC_EFUSE_SECURE_INF_AO1        SC_EFUSE_SECURE_INF_AO1        ; /* E048 */
    volatile U_SC_BOOT_INFO                   SC_BOOT_INFO                   ; /* E088 */
    volatile U_SC_PAD_INFO                    SC_PAD_INFO                    ; /* E08C */
    volatile U_SC_LAST_RST_STATUS             SC_LAST_RST_STATUS             ; /* E090 */
    volatile U_SC_BOARD_CFG_INFO              SC_BOARD_CFG_INFO              ; /* E094 */
    volatile U_SC_EFUSE_HARD_REPAIR_DONE      SC_EFUSE_HARD_REPAIR_DONE      ; /* E098 */
    volatile U_SYSCTRL_CFG_VERSION0           SYSCTRL_CFG_VERSION0           ; /* E0A0 */
    volatile U_SYSCTRL_CFG_MAGIC_WORD         SYSCTRL_CFG_MAGIC_WORD         ; /* E0A4 */
    volatile U_SYSCTRL_CFG_ECO_CFG0           SYSCTRL_CFG_ECO_CFG0           ; /* E0A8 */
    volatile U_SYSCTRL_CFG_ECO_CFG1           SYSCTRL_CFG_ECO_CFG1           ; /* E0AC */
    volatile U_SYSCTRL_CFG_ECO_CFG2           SYSCTRL_CFG_ECO_CFG2           ; /* E0B0 */
    volatile U_SYSCTRL_CFG_ECO_CFG3           SYSCTRL_CFG_ECO_CFG3           ; /* E0B4 */
    volatile U_SC_DIE_ID0                     SC_DIE_ID0                     ; /* E200 */
    volatile U_SC_DIE_ID1                     SC_DIE_ID1                     ; /* E204 */
    volatile U_SC_DIE_ID2                     SC_DIE_ID2                     ; /* E208 */
    volatile U_SC_DIE_ID3                     SC_DIE_ID3                     ; /* E20C */
    volatile U_SC_DIE_ID4                     SC_DIE_ID4                     ; /* E210 */
    volatile U_SC_DIE_ID5                     SC_DIE_ID5                     ; /* E214 */
    volatile U_SC_DIE_ID6                     SC_DIE_ID6                     ; /* E218 */
    volatile U_SC_DIE_ID7                     SC_DIE_ID7                     ; /* E21C */
    volatile U_SC_DJTAG_RD_DATA0              SC_DJTAG_RD_DATA0              ; /* E800 */
    volatile U_SC_DJTAG_RD_DATA1              SC_DJTAG_RD_DATA1              ; /* E804 */
    volatile U_SC_DJTAG_RD_DATA2              SC_DJTAG_RD_DATA2              ; /* E808 */
    volatile U_SC_DJTAG_RD_DATA3              SC_DJTAG_RD_DATA3              ; /* E80C */
    volatile U_SC_DJTAG_RD_DATA4              SC_DJTAG_RD_DATA4              ; /* E810 */
    volatile U_SC_DJTAG_RD_DATA5              SC_DJTAG_RD_DATA5              ; /* E814 */
    volatile U_SC_DJTAG_RD_DATA6              SC_DJTAG_RD_DATA6              ; /* E818 */
    volatile U_SC_DJTAG_RD_DATA7              SC_DJTAG_RD_DATA7              ; /* E81C */
    volatile U_SC_DJTAG_RD_DATA8              SC_DJTAG_RD_DATA8              ; /* E820 */
    volatile U_SC_DJTAG_RD_DATA9              SC_DJTAG_RD_DATA9              ; /* E824 */
    volatile U_SC_DJTAG_OP_ST                 SC_DJTAG_OP_ST                 ; /* E828 */
    volatile U_SC_USB3_ST3                    SC_USB3_ST3                    ; /* E91C */
    volatile U_SC_USB3_ST4                    SC_USB3_ST4                    ; /* E920 */
    volatile U_SC_USB3_ST6                    SC_USB3_ST6                    ; /* E928 */
    volatile U_SC_USB3_ST7                    SC_USB3_ST7                    ; /* E92C */
    volatile U_SC_USB3_PHY_ST0                SC_USB3_PHY_ST0                ; /* E950 */
    volatile U_SC_NORESET_0                   SC_NORESET_0                   ; /* F000 */
    volatile U_SC_NORESET_1                   SC_NORESET_1                   ; /* F004 */
    volatile U_SC_NORESET_2                   SC_NORESET_2                   ; /* F008 */
    volatile U_SC_NORESET_3                   SC_NORESET_3                   ; /* F00C */
    volatile U_SC_NORESET_4                   SC_NORESET_4                   ; /* F010 */
    volatile U_SC_NORESET_5                   SC_NORESET_5                   ; /* F014 */
    volatile U_SC_NORESET_6                   SC_NORESET_6                   ; /* F018 */
    volatile U_SC_NORESET_7                   SC_NORESET_7                   ; /* F01C */
    volatile U_SC_NORESET_8                   SC_NORESET_8                   ; /* F020 */
    volatile U_SC_NORESET_9                   SC_NORESET_9                   ; /* F024 */
    volatile U_SC_NORESET_10                  SC_NORESET_10                  ; /* F028 */
    volatile U_SC_NORESET_11                  SC_NORESET_11                  ; /* F02C */
    volatile U_SC_NORESET_12                  SC_NORESET_12                  ; /* F030 */
    volatile U_SC_NORESET_13                  SC_NORESET_13                  ; /* F034 */
    volatile U_SC_NORESET_14                  SC_NORESET_14                  ; /* F038 */
    volatile U_SC_NORESET_15                  SC_NORESET_15                  ; /* F03C */
    volatile U_SC_SYSCTRL_LOCK                SC_SYSCTRL_LOCK                ; /* F100 */
    volatile U_SC_SYSCTRL_UNLOCK              SC_SYSCTRL_UNLOCK              ; /* F110 */
    volatile U_SC_PROBE_MUX_SEL               SC_PROBE_MUX_SEL               ; /* F200 */
    volatile U_SC_ECO_RSV0                    SC_ECO_RSV0                    ; /* FF00 */
    volatile U_SC_ECO_RSV1                    SC_ECO_RSV1                    ; /* FF04 */
    volatile U_SC_ECO_RSV2                    SC_ECO_RSV2                    ; /* FF08 */
    volatile U_SC_ECO_RSV3                    SC_ECO_RSV3                    ; /* FF0C */
    volatile U_SC_ECO_RSV4                    SC_ECO_RSV4                    ; /* FF10 */
    volatile U_SC_ECO_RSV5                    SC_ECO_RSV5                    ; /* FF14 */
    volatile U_SC_SOFT_POR_RSV0               SC_SOFT_POR_RSV0               ; /* FF20 */
    volatile U_SC_SOFT_POR_RSV1               SC_SOFT_POR_RSV1               ; /* FF24 */
    volatile U_SC_SOFT_POR_RSV2               SC_SOFT_POR_RSV2               ; /* FF28 */
    volatile U_SC_SOFT_POR_RSV3               SC_SOFT_POR_RSV3               ; /* FF2C */
    volatile U_SC_MONITOR_TEST0               SC_MONITOR_TEST0               ; /* FFF0 */
    volatile U_SC_MONITOR_TEST1               SC_MONITOR_TEST1               ; /* FFF4 */
    volatile U_SC_VER_VER                     SC_VER_VER                     ; /* FFFC */

} S_sysctrl_cfg_REGS_TYPE;

/* Declare the struct pointor of the module sysctrl_cfg */
extern volatile S_sysctrl_cfg_REGS_TYPE *gopsysctrl_cfgAllReg;

/* Declare the functions that set the member value */
int iSetSC_PLL0FCTRL_pll0_foutvcopd(unsigned int upll0_foutvcopd);
int iSetSC_PLL0FCTRL_pll0_foutpostdivpd(unsigned int upll0_foutpostdivpd);
int iSetSC_PLL0FCTRL_pll0_fout4phasepd(unsigned int upll0_fout4phasepd);
int iSetSC_PLL0FCTRL_pll0_dacpd(unsigned int upll0_dacpd);
int iSetSC_PLL0FCTRL_pll0_dsmpd(unsigned int upll0_dsmpd);
int iSetSC_PLL0FCTRL_pll0_pd(unsigned int upll0_pd);
int iSetSC_PLL0FCTRL_pll0_bypass(unsigned int upll0_bypass);
int iSetSC_PLL0FCTRL_pll0_postdiv2(unsigned int upll0_postdiv2);
int iSetSC_PLL0FCTRL_pll0_postdiv1(unsigned int upll0_postdiv1);
int iSetSC_PLL0FCTRL_pll0_fbdiv(unsigned int upll0_fbdiv);
int iSetSC_PLL0FCTRL_pll0_refdiv(unsigned int upll0_refdiv);
int iSetSC_PLL0FCTRL_FRAC_pll0_frac(unsigned int upll0_frac);
int iSetSC_PLL1FCTRL_pll1_foutvcopd(unsigned int upll1_foutvcopd);
int iSetSC_PLL1FCTRL_pll1_foutpostdivpd(unsigned int upll1_foutpostdivpd);
int iSetSC_PLL1FCTRL_pll1_fout4phasepd(unsigned int upll1_fout4phasepd);
int iSetSC_PLL1FCTRL_pll1_dacpd(unsigned int upll1_dacpd);
int iSetSC_PLL1FCTRL_pll1_dsmpd(unsigned int upll1_dsmpd);
int iSetSC_PLL1FCTRL_pll1_pd(unsigned int upll1_pd);
int iSetSC_PLL1FCTRL_pll1_bypass(unsigned int upll1_bypass);
int iSetSC_PLL1FCTRL_pll1_postdiv2(unsigned int upll1_postdiv2);
int iSetSC_PLL1FCTRL_pll1_postdiv1(unsigned int upll1_postdiv1);
int iSetSC_PLL1FCTRL_pll1_fbdiv(unsigned int upll1_fbdiv);
int iSetSC_PLL1FCTRL_pll1_refdiv(unsigned int upll1_refdiv);
int iSetSC_PLL1FCTRL_FRAC_pll1_frac(unsigned int upll1_frac);
int iSetSC_PLL2FCTRL_pll2_foutvcopd(unsigned int upll2_foutvcopd);
int iSetSC_PLL2FCTRL_pll2_foutpostdivpd(unsigned int upll2_foutpostdivpd);
int iSetSC_PLL2FCTRL_pll2_fout4phasepd(unsigned int upll2_fout4phasepd);
int iSetSC_PLL2FCTRL_pll2_dacpd(unsigned int upll2_dacpd);
int iSetSC_PLL2FCTRL_pll2_dsmpd(unsigned int upll2_dsmpd);
int iSetSC_PLL2FCTRL_pll2_pd(unsigned int upll2_pd);
int iSetSC_PLL2FCTRL_pll2_bypass(unsigned int upll2_bypass);
int iSetSC_PLL2FCTRL_pll2_postdiv2(unsigned int upll2_postdiv2);
int iSetSC_PLL2FCTRL_pll2_postdiv1(unsigned int upll2_postdiv1);
int iSetSC_PLL2FCTRL_pll2_fbdiv(unsigned int upll2_fbdiv);
int iSetSC_PLL2FCTRL_pll2_refdiv(unsigned int upll2_refdiv);
int iSetSC_PLL2FCTRL_FRAC_pll2_frac(unsigned int upll2_frac);
int iSetSC_PLL3FCTRL_pll3_foutvcopd(unsigned int upll3_foutvcopd);
int iSetSC_PLL3FCTRL_pll3_foutpostdivpd(unsigned int upll3_foutpostdivpd);
int iSetSC_PLL3FCTRL_pll3_fout4phasepd(unsigned int upll3_fout4phasepd);
int iSetSC_PLL3FCTRL_pll3_dacpd(unsigned int upll3_dacpd);
int iSetSC_PLL3FCTRL_pll3_dsmpd(unsigned int upll3_dsmpd);
int iSetSC_PLL3FCTRL_pll3_pd(unsigned int upll3_pd);
int iSetSC_PLL3FCTRL_pll3_bypass(unsigned int upll3_bypass);
int iSetSC_PLL3FCTRL_pll3_postdiv2(unsigned int upll3_postdiv2);
int iSetSC_PLL3FCTRL_pll3_postdiv1(unsigned int upll3_postdiv1);
int iSetSC_PLL3FCTRL_pll3_fbdiv(unsigned int upll3_fbdiv);
int iSetSC_PLL3FCTRL_pll3_refdiv(unsigned int upll3_refdiv);
int iSetSC_PLL3FCTRL_FRAC_pll3_frac(unsigned int upll3_frac);
int iSetSC_PLL4FCTRL_pll4_foutvcopd(unsigned int upll4_foutvcopd);
int iSetSC_PLL4FCTRL_pll4_foutpostdivpd(unsigned int upll4_foutpostdivpd);
int iSetSC_PLL4FCTRL_pll4_fout4phasepd(unsigned int upll4_fout4phasepd);
int iSetSC_PLL4FCTRL_pll4_dacpd(unsigned int upll4_dacpd);
int iSetSC_PLL4FCTRL_pll4_dsmpd(unsigned int upll4_dsmpd);
int iSetSC_PLL4FCTRL_pll4_pd(unsigned int upll4_pd);
int iSetSC_PLL4FCTRL_pll4_bypass(unsigned int upll4_bypass);
int iSetSC_PLL4FCTRL_pll4_postdiv2(unsigned int upll4_postdiv2);
int iSetSC_PLL4FCTRL_pll4_postdiv1(unsigned int upll4_postdiv1);
int iSetSC_PLL4FCTRL_pll4_fbdiv(unsigned int upll4_fbdiv);
int iSetSC_PLL4FCTRL_pll4_refdiv(unsigned int upll4_refdiv);
int iSetSC_PLL4FCTRL_FRAC_pll4_frac(unsigned int upll4_frac);
int iSetSC_PLL5FCTRL_pll5_foutvcopd(unsigned int upll5_foutvcopd);
int iSetSC_PLL5FCTRL_pll5_foutpostdivpd(unsigned int upll5_foutpostdivpd);
int iSetSC_PLL5FCTRL_pll5_fout4phasepd(unsigned int upll5_fout4phasepd);
int iSetSC_PLL5FCTRL_pll5_dacpd(unsigned int upll5_dacpd);
int iSetSC_PLL5FCTRL_pll5_dsmpd(unsigned int upll5_dsmpd);
int iSetSC_PLL5FCTRL_pll5_pd(unsigned int upll5_pd);
int iSetSC_PLL5FCTRL_pll5_bypass(unsigned int upll5_bypass);
int iSetSC_PLL5FCTRL_pll5_postdiv2(unsigned int upll5_postdiv2);
int iSetSC_PLL5FCTRL_pll5_postdiv1(unsigned int upll5_postdiv1);
int iSetSC_PLL5FCTRL_pll5_fbdiv(unsigned int upll5_fbdiv);
int iSetSC_PLL5FCTRL_pll5_refdiv(unsigned int upll5_refdiv);
int iSetSC_PLL5FCTRL_FRAC_pll5_frac(unsigned int upll5_frac);
int iSetSC_PLL_CLK_BYPASS0_pll5_bypass_external_n(unsigned int upll5_bypass_external_n);
int iSetSC_PLL_CLK_BYPASS0_pll4_bypass_external_n(unsigned int upll4_bypass_external_n);
int iSetSC_PLL_CLK_BYPASS0_pll3_bypass_external_n(unsigned int upll3_bypass_external_n);
int iSetSC_PLL_CLK_BYPASS0_pll2_bypass_external_n(unsigned int upll2_bypass_external_n);
int iSetSC_PLL_CLK_BYPASS0_pll1_bypass_external_n(unsigned int upll1_bypass_external_n);
int iSetSC_PLL_CLK_BYPASS0_pll0_bypass_external_n(unsigned int upll0_bypass_external_n);
int iSetSC_PLL_CLK_BYPASS1_pll5_peri_mode(unsigned int upll5_peri_mode);
int iSetSC_PLL_CLK_BYPASS1_pll4_peri_mode(unsigned int upll4_peri_mode);
int iSetSC_PLL_CLK_BYPASS1_pll3_peri_mode(unsigned int upll3_peri_mode);
int iSetSC_PLL_CLK_BYPASS1_pll2_peri_mode(unsigned int upll2_peri_mode);
int iSetSC_PLL_CLK_BYPASS1_pll1_peri_mode(unsigned int upll1_peri_mode);
int iSetSC_PLL_CLK_BYPASS1_pll0_peri_mode(unsigned int upll0_peri_mode);
int iSetSC_PLLCTRL_pll_time(unsigned int upll_time);
int iSetSC_PLLCTRL_pll_en_sw(unsigned int upll_en_sw);
int iSetSC_PLLCTRL_pll_over(unsigned int upll_over);
int iSetSC_SYSMODE_CTRL_modectrl(unsigned int umodectrl);
int iSetSC_HPM_CLK_SEL_hpm_clk_sel(unsigned int uhpm_clk_sel);
int iSetSC_MBIST_CPUI_CLK_SEL_func_mbist_clk_sel(unsigned int ufunc_mbist_clk_sel);
int iSetSC_PLL0_OUT_CLK_SEL_pll0_out_clk_sel(unsigned int upll0_out_clk_sel);
int iSetSC_ALL_SCAN_CTRL_all_scan_sys_int(unsigned int uall_scan_sys_int);
int iSetSC_SYSSOFTRST_CTRL_sys_soft_rst(unsigned int usys_soft_rst);
int iSetSC_PORN_ENABLE_porn_enable(unsigned int uporn_enable);
int iSetSC_SDMA_CLK_EN_icg_en_sdma(unsigned int uicg_en_sdma);
int iSetSC_SDMA_CLK_DIS_icg_dis_sdma(unsigned int uicg_dis_sdma);
int iSetSC_FTE_CLK_EN_icg_en_fte(unsigned int uicg_en_fte);
int iSetSC_FTE_CLK_DIS_icg_dis_fte(unsigned int uicg_dis_fte);
int iSetSC_SMMU_CLK_EN_icg_en_smmu(unsigned int uicg_en_smmu);
int iSetSC_SMMU_CLK_DIS_icg_dis_smmu(unsigned int uicg_dis_smmu);
int iSetSC_RGMII_CLK_EN_icg_en_rgmii_bus(unsigned int uicg_en_rgmii_bus);
int iSetSC_RGMII_CLK_EN_icg_en_rgmii_gsf_axi(unsigned int uicg_en_rgmii_gsf_axi);
int iSetSC_RGMII_CLK_EN_icg_en_rgmii_sys_pub(unsigned int uicg_en_rgmii_sys_pub);
int iSetSC_RGMII_CLK_EN_icg_en_rgmii_gsf_125(unsigned int uicg_en_rgmii_gsf_125);
int iSetSC_RGMII_CLK_EN_icg_en_rgmii_crg_125(unsigned int uicg_en_rgmii_crg_125);
int iSetSC_RGMII_CLK_EN_icg_en_rgmii_rx(unsigned int uicg_en_rgmii_rx);
int iSetSC_RGMII_CLK_DIS_icg_dis_rgmii_bus(unsigned int uicg_dis_rgmii_bus);
int iSetSC_RGMII_CLK_DIS_icg_dis_rgmii_gsf_axi(unsigned int uicg_dis_rgmii_gsf_axi);
int iSetSC_RGMII_CLK_DIS_icg_dis_rgmii_sys_pub(unsigned int uicg_dis_rgmii_sys_pub);
int iSetSC_RGMII_CLK_DIS_icg_dis_rgmii_gsf_125(unsigned int uicg_dis_rgmii_gsf_125);
int iSetSC_RGMII_CLK_DIS_icg_dis_rgmii_crg_125(unsigned int uicg_dis_rgmii_crg_125);
int iSetSC_RGMII_CLK_DIS_icg_dis_rgmii_rx(unsigned int uicg_dis_rgmii_rx);
int iSetSC_USB_CLK_EN_icg_en_usb_bus_early(unsigned int uicg_en_usb_bus_early);
int iSetSC_USB_CLK_EN_icg_en_usb_suspend(unsigned int uicg_en_usb_suspend);
int iSetSC_USB_CLK_EN_icg_en_usb_pipe3p(unsigned int uicg_en_usb_pipe3p);
int iSetSC_USB_CLK_EN_icg_en_usb_utmi(unsigned int uicg_en_usb_utmi);
int iSetSC_USB_CLK_DIS_icg_dis_usb_bus_early(unsigned int uicg_dis_usb_bus_early);
int iSetSC_USB_CLK_DIS_icg_dis_usb_suspend(unsigned int uicg_dis_usb_suspend);
int iSetSC_USB_CLK_DIS_icg_dis_usb_pipe3p(unsigned int uicg_dis_usb_pipe3p);
int iSetSC_USB_CLK_DIS_icg_dis_usb_utmi(unsigned int uicg_dis_usb_utmi);
int iSetSC_SYC_COUNTER_CLK_EN_icg_en_sys_counter(unsigned int uicg_en_sys_counter);
int iSetSC_SYS_COUNTER_CLK_DIS_icg_dis_sys_counter(unsigned int uicg_dis_sys_counter);
int iSetSC_DDR_CLK_EN_icg_en_ddr(unsigned int uicg_en_ddr);
int iSetSC_DDR_CLK_DIS_icg_dis_ddr(unsigned int uicg_dis_ddr);
int iSetSC_HHA_CLK_EN_icg_en_hha1(unsigned int uicg_en_hha1);
int iSetSC_HHA_CLK_DIS_icg_dis_hha1(unsigned int uicg_dis_hha1);
int iSetSC_MN_CLK_EN_icg_en_mn1(unsigned int uicg_en_mn1);
int iSetSC_MN_CLK_DIS_icg_dis_mn1(unsigned int uicg_dis_mn1);
int iSetSC_DDR_EXMBITST_CLK_EN_icg_en_exmbist_cfg(unsigned int uicg_en_exmbist_cfg);
int iSetSC_DDR_EXMBITST_CLK_EN_icg_en_exmbist_aclk(unsigned int uicg_en_exmbist_aclk);
int iSetSC_DDR_EXMBITST_CLK_DIS_icg_dis_exmbist_cfg(unsigned int uicg_dis_exmbist_cfg);
int iSetSC_DDR_EXMBITST_CLK_DIS_icg_dis_exmbist_aclk(unsigned int uicg_dis_exmbist_aclk);
int iSetSC_DDR_APB_CLK_EN_icg_en_dum_apb(unsigned int uicg_en_dum_apb);
int iSetSC_DDR_APB_CLK_EN_icg_en_p2p_m(unsigned int uicg_en_p2p_m);
int iSetSC_DDR_APB_CLK_DIS_icg_dis_dum_apb(unsigned int uicg_dis_dum_apb);
int iSetSC_DDR_APB_CLK_DIS_icg_dis_p2p_m(unsigned int uicg_dis_p2p_m);
int iSetSC_PROBE_CLK_EN_icg_en_probe(unsigned int uicg_en_probe);
int iSetSC_PROBE_CLK_DIS_icg_dis_probe(unsigned int uicg_dis_probe);
int iSetSC_LLC_CLK_EN_icg_en_llc(unsigned int uicg_en_llc);
int iSetSC_LLC_CLK_DIS_icg_dis_llc(unsigned int uicg_dis_llc);
int iSetSC_L2BUFF_CLK_EN_icg_en_l2buff1(unsigned int uicg_en_l2buff1);
int iSetSC_L2BUFF_CLK_DIS_icg_dis_l2buff1(unsigned int uicg_dis_l2buff1);
int iSetSC_PCIE_CLK_EN_icg_en_pipe(unsigned int uicg_en_pipe);
int iSetSC_PCIE_CLK_EN_icg_en_phy_jtag_tck(unsigned int uicg_en_phy_jtag_tck);
int iSetSC_PCIE_CLK_EN_icg_en_phy_cr_para(unsigned int uicg_en_phy_cr_para);
int iSetSC_PCIE_CLK_DIS_icg_dis_pipe(unsigned int uicg_dis_pipe);
int iSetSC_PCIE_CLK_DIS_icg_dis_phy_jtag_tck(unsigned int uicg_dis_phy_jtag_tck);
int iSetSC_PCIE_CLK_DIS_icg_dis_phy_cr_para(unsigned int uicg_dis_phy_cr_para);
int iSetSC_I2C_CLK_EN_icg_en_i2c(unsigned int uicg_en_i2c);
int iSetSC_I2C_CLK_DIS_icg_dis_i2c(unsigned int uicg_dis_i2c);
int iSetSC_TIMER_CLK_EN_icg_en_timer(unsigned int uicg_en_timer);
int iSetSC_TIMER_CLK_DIS_icg_dis_timer(unsigned int uicg_dis_timer);
int iSetSC_GPIO_CLK_EN_icg_en_gpio(unsigned int uicg_en_gpio);
int iSetSC_GPIO_CLK_DIS_icg_dis_gpio(unsigned int uicg_dis_gpio);
int iSetSC_SFC_BUS_CLK_EN_icg_en_sfc_bus(unsigned int uicg_en_sfc_bus);
int iSetSC_SFC_BUS_CLK_DIS_icg_dis_sfc_bus(unsigned int uicg_dis_sfc_bus);
int iSetSC_REF_CLK_EN_icg_en_ref(unsigned int uicg_en_ref);
int iSetSC_REF_CLK_DIS_icg_dis_ref(unsigned int uicg_dis_ref);
int iSetSC_GPIO_DB_CLK_EN_icg_en_gpio_db(unsigned int uicg_en_gpio_db);
int iSetSC_GPIO_DB_CLK_DIS_icg_dis_gpio_db(unsigned int uicg_dis_gpio_db);
int iSetSC_DJTAG_CLK_EN_icg_en_djtag(unsigned int uicg_en_djtag);
int iSetSC_DJTAG_CLK_DIS_icg_dis_djtag(unsigned int uicg_dis_djtag);
int iSetSC_FUNC_MBIST_CLK_EN_icg_en_func_mbist(unsigned int uicg_en_func_mbist);
int iSetSC_FUNC_MBIST_CLK_DIS_icg_dis_func_mbist(unsigned int uicg_dis_func_mbist);
int iSetSC_HPM_CLK_EN_icg_en_hpm(unsigned int uicg_en_hpm);
int iSetSC_HPM_CLK_DIS_icg_dis_hpm(unsigned int uicg_dis_hpm);
int iSetSC_ULTRASOC_CLK_EN_icg_en_ultrasoc(unsigned int uicg_en_ultrasoc);
int iSetSC_ULTRASOC_CLK_EN_icg_en_chie_mon(unsigned int uicg_en_chie_mon);
int iSetSC_ULTRASOC_CLK_DIS_icg_dis_ultrasoc(unsigned int uicg_dis_ultrasoc);
int iSetSC_ULTRASOC_CLK_DIS_icg_dis_chie_mon(unsigned int uicg_dis_chie_mon);
int iSetSC_SPMI_CLK_EN_icg_en_spmi(unsigned int uicg_en_spmi);
int iSetSC_SPMI_CLK_DIS_icg_dis_spmi(unsigned int uicg_dis_spmi);
int iSetSC_PWM_CLK_EN_icg_en_pwm_8k(unsigned int uicg_en_pwm_8k);
int iSetSC_PWM_CLK_DIS_icg_dis_pwm_8k(unsigned int uicg_dis_pwm_8k);
int iSetSC_TIMERSTAMP_CLK_EN_icg_en_timestamp(unsigned int uicg_en_timestamp);
int iSetSC_TIMESTAMP_CLK_DIS_icg_dis_timestamp(unsigned int uicg_dis_timestamp);
int iSetSC_L2BUFF_MBIST_CLK_EN_icg_en_mbist_l2buff1(unsigned int uicg_en_mbist_l2buff1);
int iSetSC_L2BUFF_MBIST_CLK_EN_icg_en_mbist_l2buff0(unsigned int uicg_en_mbist_l2buff0);
int iSetSC_L2BUFF_MBIST_CLK_DIS_icg_dis_mbist_l2buff1(unsigned int uicg_dis_mbist_l2buff1);
int iSetSC_L2BUFF_MBIST_CLK_DIS_icg_dis_mbist_l2buff0(unsigned int uicg_dis_mbist_l2buff0);
int iSetSC_SRC_AI_CLK_EN_icg_en_src_ai1(unsigned int uicg_en_src_ai1);
int iSetSC_SRC_AI_CLK_EN_icg_en_src_ai0(unsigned int uicg_en_src_ai0);
int iSetSC_SRC_AI_CLK_DIS_icg_dis_src_ai1(unsigned int uicg_dis_src_ai1);
int iSetSC_SRC_AI_CLK_DIS_icg_dis_src_ai0(unsigned int uicg_dis_src_ai0);
int iSetSC_GIC_CPU_CLK_EN_icg_en_gic_cpu_asyn(unsigned int uicg_en_gic_cpu_asyn);
int iSetSC_GIC_CPU_CLK_DIS_icg_dis_gic_cpu_asyn(unsigned int uicg_dis_gic_cpu_asyn);
int iSetSC_CRS_CLK_EN_icg_en_crs_asyn(unsigned int uicg_en_crs_asyn);
int iSetSC_CRS_CLK_DIS_icg_dis_crs_asyn(unsigned int uicg_dis_crs_asyn);
int iSetSC_SDMAM_RESET_REQ_srst_req_sdma(unsigned int usrst_req_sdma);
int iSetSC_SDMA_RESET_DREQ_srst_dreq_sdma(unsigned int usrst_dreq_sdma);
int iSetSC_FTE_RESET_REQ_srst_req_fte(unsigned int usrst_req_fte);
int iSetSC_FTE_RESET_DREQ_srst_dreq_fte(unsigned int usrst_dreq_fte);
int iSetSC_USB_RESET_REQ_srst_req_usbphy_port(unsigned int usrst_req_usbphy_port);
int iSetSC_USB_RESET_REQ_srst_req_usb_vcc(unsigned int usrst_req_usb_vcc);
int iSetSC_USB_RESET_REQ_srst_req_usbphy_pipe0(unsigned int usrst_req_usbphy_pipe0);
int iSetSC_USB_RESET_REQ_srst_req_usbphy(unsigned int usrst_req_usbphy);
int iSetSC_USB_RESET_DREQ_srst_dreq_usbphy_port(unsigned int usrst_dreq_usbphy_port);
int iSetSC_USB_RESET_DREQ_srst_dreq_usb_vcc(unsigned int usrst_dreq_usb_vcc);
int iSetSC_USB_RESET_DREQ_srst_dreq_usbphy_pipe0(unsigned int usrst_dreq_usbphy_pipe0);
int iSetSC_USB_RESET_DREQ_srst_dreq_usbphy(unsigned int usrst_dreq_usbphy);
int iSetSC_MII_RESET_REQ_srst_req_rgmii_gsf(unsigned int usrst_req_rgmii_gsf);
int iSetSC_MII_RESET_REQ_srst_req_rgmii_mac_if(unsigned int usrst_req_rgmii_mac_if);
int iSetSC_MII_RESET_DREQ_srst_dreq_rgmii_gsf(unsigned int usrst_dreq_rgmii_gsf);
int iSetSC_MII_RESET_DREQ_srst_dreq_rgmii_mac_if(unsigned int usrst_dreq_rgmii_mac_if);
int iSetSC_SYS_COUNTERM_RESET_REQ_srst_req_sys_counter(unsigned int usrst_req_sys_counter);
int iSetSC_SYS_COUNTER_RESET_DREQ_srst_dreq_sys_counter(unsigned int usrst_dreq_sys_counter);
int iSetSC_DDRC_RESET_REQ_srst_req_ddrc(unsigned int usrst_req_ddrc);
int iSetSC_DDRC_RESET_DREQ_srst_dreq_ddrc(unsigned int usrst_dreq_ddrc);
int iSetSC_HHA_RESET_REQ_srst_req_hha1(unsigned int usrst_req_hha1);
int iSetSC_HHA_RESET_DREQ_srst_dreq_hha1(unsigned int usrst_dreq_hha1);
int iSetSC_MN_RESET_REQ_srst_req_mn1(unsigned int usrst_req_mn1);
int iSetSC_MN_RESET_DREQ_srst_dreq_mn1(unsigned int usrst_dreq_mn1);
int iSetSC_DDRC_EXMBIST_RESET_REQ_srst_req_exmbist_areset(unsigned int usrst_req_exmbist_areset);
int iSetSC_DDRC_EXMBIST_RESET_REQ_srst_req_exmbist(unsigned int usrst_req_exmbist);
int iSetSC_DDRC_EXMBIST_RESET_DREQ_srst_dreq_exmbist_areset(unsigned int usrst_dreq_exmbist_areset);
int iSetSC_DDRC_EXMBIST_RESET_DREQ_srst_dreq_exmbist(unsigned int usrst_dreq_exmbist);
int iSetSC_DDRC_PACK_RESET_REQ_srst_req_dum(unsigned int usrst_req_dum);
int iSetSC_DDRC_PACK_RESET_REQ_srst_req_p2p_m(unsigned int usrst_req_p2p_m);
int iSetSC_DDRC_PACK_REGS_RESET_DREQ_srst_dreq_dum(unsigned int usrst_dreq_dum);
int iSetSC_DDRC_PACK_REGS_RESET_DREQ_srst_dreq_p2p_m(unsigned int usrst_dreq_p2p_m);
int iSetSC_LLC_RESET_REQ_srst_req_llc(unsigned int usrst_req_llc);
int iSetSC_LLC__REGS_RESET_DREQ_srst_dreq_llc(unsigned int usrst_dreq_llc);
int iSetSC_L2BUFF_RESET_REQ_srst_req_l2buff1(unsigned int usrst_req_l2buff1);
int iSetSC_L2BUFF__REGS_RESET_DREQ_srst_dreq_l2buff1(unsigned int usrst_dreq_l2buff1);
int iSetSC_PCIE_RESET_REQ_srst_req_pcie_phy(unsigned int usrst_req_pcie_phy);
int iSetSC_PCIE_RESET_REQ_srst_req_por_pcie(unsigned int usrst_req_por_pcie);
int iSetSC_PCIE_RESET_REQ_srst_req_pcie(unsigned int usrst_req_pcie);
int iSetSC_PCIE__REGS_RESET_DREQ_srst_dreq_pcie_phy(unsigned int usrst_dreq_pcie_phy);
int iSetSC_PCIE__REGS_RESET_DREQ_srst_dreq_por_pcie(unsigned int usrst_dreq_por_pcie);
int iSetSC_PCIE__REGS_RESET_DREQ_srst_dreq_pcie(unsigned int usrst_dreq_pcie);
int iSetSC_I2C_RESET_REQ_srst_req_i2c(unsigned int usrst_req_i2c);
int iSetSC_I2C__REGS_RESET_DREQ_srst_dreq_i2c(unsigned int usrst_dreq_i2c);
int iSetSC_TIMER_RESET_REQ_srst_req_timer(unsigned int usrst_req_timer);
int iSetSC_TIMER__REGS_RESET_DREQ_srst_dreq_timer(unsigned int usrst_dreq_timer);
int iSetSC_GPIO_RESET_REQ_srst_req_gpio(unsigned int usrst_req_gpio);
int iSetSC_GPIO__REGS_RESET_DREQ_srst_dreq_gpio(unsigned int usrst_dreq_gpio);
int iSetSC_SPMI_RESET_REQ_srst_req_spmi(unsigned int usrst_req_spmi);
int iSetSC_SPMI__REGS_RESET_DREQ_srst_dreq_spmi(unsigned int usrst_dreq_spmi);
int iSetSC_USB_UTMI_RESET_REQ_srst_req_usb_utmi(unsigned int usrst_req_usb_utmi);
int iSetSC_USB_UTMI__REGS_RESET_DREQ_srst_dreq_usb_utmi(unsigned int usrst_dreq_usb_utmi);
int iSetSC_ULTRASOC_RESET_REQ_srst_req_ultrasoc(unsigned int usrst_req_ultrasoc);
int iSetSC_ULTRASOC_RESET_REQ_srst_req_chie_mon(unsigned int usrst_req_chie_mon);
int iSetSC_ULTRASOC__REGS_RESET_DREQ_srst_dreq_ultrasoc(unsigned int usrst_dreq_ultrasoc);
int iSetSC_ULTRASOC__REGS_RESET_DREQ_srst_dreq_chie_mon(unsigned int usrst_dreq_chie_mon);
int iSetSC_CPM_RESET_REQ_srst_req_cpm1(unsigned int usrst_req_cpm1);
int iSetSC_CPM_RESET_REQ_srst_req_cpm0(unsigned int usrst_req_cpm0);
int iSetSC_CPM__REGS_RESET_DREQ_srst_dreq_cpm1(unsigned int usrst_dreq_cpm1);
int iSetSC_CPM__REGS_RESET_DREQ_srst_dreq_cpm0(unsigned int usrst_dreq_cpm0);
int iSetSC_SVFD_RESET_REQ_srst_req_svfd1(unsigned int usrst_req_svfd1);
int iSetSC_SVFD_RESET_REQ_srst_req_svfd0(unsigned int usrst_req_svfd0);
int iSetSC_SVFD__REGS_RESET_DREQ_srst_dreq_svfd1(unsigned int usrst_dreq_svfd1);
int iSetSC_SVFD__REGS_RESET_DREQ_srst_dreq_svfd0(unsigned int usrst_dreq_svfd0);
int iSetSC_BISR_S_RESET_REQ_srst_req_bisr_s(unsigned int usrst_req_bisr_s);
int iSetSC_BISR_S_RESET_DREQ_srst_dreq_bisr_s(unsigned int usrst_dreq_bisr_s);
int iSetSC_PWM_RESET_REQ_srst_req_pwm_8k(unsigned int usrst_req_pwm_8k);
int iSetSC_PWM_RESET_DREQ_srst_dreq_pwm_8k(unsigned int usrst_dreq_pwm_8k);
int iSetSC_BISR_RESET_REQ_srst_req_bisr(unsigned int usrst_req_bisr);
int iSetSC_BISR_RESET_DREQ_srst_dreq_bisr(unsigned int usrst_dreq_bisr);
int iSetSC_STATUS_RESET_REQ_srst_req_status(unsigned int usrst_req_status);
int iSetSC_STATUS_RESET_DREQ_srst_dreq_status(unsigned int usrst_dreq_status);
int iSetSC_AICORE0_RESET_REQ_srst_req_por_aicore0(unsigned int usrst_req_por_aicore0);
int iSetSC_AICORE0_RESET_REQ_srst_req_aicore0(unsigned int usrst_req_aicore0);
int iSetSC_AICORE0_RESET_DREQ_srst_dreq_por_aicore0(unsigned int usrst_dreq_por_aicore0);
int iSetSC_AICORE0_RESET_DREQ_srst_dreq_aicore0(unsigned int usrst_dreq_aicore0);
int iSetSC_AICORE1_RESET_REQ_srst_req_por_aicore1(unsigned int usrst_req_por_aicore1);
int iSetSC_AICORE1_RESET_REQ_srst_req_aicore1(unsigned int usrst_req_aicore1);
int iSetSC_AICORE1_RESET_DREQ_srst_dreq_por_aicore1(unsigned int usrst_dreq_por_aicore1);
int iSetSC_AICORE1_RESET_DREQ_srst_dreq_aicore1(unsigned int usrst_dreq_aicore1);
int iSetSC_CPU_RESET_REQ_srst_req_por_cpu(unsigned int usrst_req_por_cpu);
int iSetSC_CPU_RESET_REQ_srst_req_cpu(unsigned int usrst_req_cpu);
int iSetSC_CPU_RESET_DREQ_srst_dreq_por_cpu(unsigned int usrst_dreq_por_cpu);
int iSetSC_CPU_RESET_DREQ_srst_dreq_cpu(unsigned int usrst_dreq_cpu);
int iSetSC_SFC_BUS_RESET_REQ_srst_req_sfc_bus(unsigned int usrst_req_sfc_bus);
int iSetSC_SFC_BUS_RESET_DREQ_srst_dreq_sfc_bus(unsigned int usrst_dreq_sfc_bus);
int iSetSC_STAMP_RESET_REQ_srst_req_timestamp(unsigned int usrst_req_timestamp);
int iSetSC_STAMP_RESET_DREQ_srst_dreq_timestamp(unsigned int usrst_dreq_timestamp);
int iSetSC_AICORE0_POWER_RESET_REQ_srst_req_power_aicore0(unsigned int usrst_req_power_aicore0);
int iSetSC_AICORE0_POWER_RESET_DREQ_srst_dreq_power_aicore0(unsigned int usrst_dreq_power_aicore0);
int iSetSC_AICORE1_POWER_RESET_REQ_srst_req_power_aicore1(unsigned int usrst_req_power_aicore1);
int iSetSC_AICORE1_POWER_RESET_DREQ_srst_dreq_power_aicore1(unsigned int usrst_dreq_power_aicore1);
int iSetSC_CPU_POWER_RESET_REQ_srst_req_power_cpu(unsigned int usrst_req_power_cpu);
int iSetSC_CPU_POWER_RESET_DREQ_srst_dreq_power_cpu(unsigned int usrst_dreq_power_cpu);
int iSetSC_DJTAG_RESET_REQ_srst_req_djtag(unsigned int usrst_req_djtag);
int iSetSC_DJTAG_RESET_DREQ_srst_dreq_djtag(unsigned int usrst_dreq_djtag);
int iSetSC_FUNC_MBIST_RESET_REQ_srst_req_func_mbist(unsigned int usrst_req_func_mbist);
int iSetSC_FUNC_MBIST_RESET_DREQ_srst_dreq_func_mbist(unsigned int usrst_dreq_func_mbist);
int iSetSC_HPM_RESET_REQ_srst_req_hpm(unsigned int usrst_req_hpm);
int iSetSC_HPM_RESET_DREQ_srst_dreq_hpm(unsigned int usrst_dreq_hpm);
int iSetSC_BISR_REPAIR_RESET_REQ_srst_req_bisr_repair(unsigned int usrst_req_bisr_repair);
int iSetSC_BISR_REPAIR_RESET_DREQ_srst_dreq_bisr_repair(unsigned int usrst_dreq_bisr_repair);
int iSetSC_PCIE_POWER_RESET_REQ_srst_req_power_pcie(unsigned int usrst_req_power_pcie);
int iSetSC_PCIE_POWER_RESET_DREQ_srst_dreq_power_pcie(unsigned int usrst_dreq_power_pcie);
int iSetSC_I2C_CTRL_SET_smbus_sda_cfg_set(unsigned int usmbus_sda_cfg_set);
int iSetSC_I2C_CTRL_SET_smbus_dat_oe_cfg_set(unsigned int usmbus_dat_oe_cfg_set);
int iSetSC_I2C_CTRL_SET_smbus_dat_mux_sel_set(unsigned int usmbus_dat_mux_sel_set);
int iSetSC_I2C_CTRL_SET_smbus_scl_cfg_set(unsigned int usmbus_scl_cfg_set);
int iSetSC_I2C_CTRL_SET_smbus_clk_oe_cfg_set(unsigned int usmbus_clk_oe_cfg_set);
int iSetSC_I2C_CTRL_SET_smbus_clk_mux_sel_set(unsigned int usmbus_clk_mux_sel_set);
int iSetSC_I2C_CTRL_SET_i2c0_sda_cfg_set(unsigned int ui2c0_sda_cfg_set);
int iSetSC_I2C_CTRL_SET_i2c0_dat_oe_cfg_set(unsigned int ui2c0_dat_oe_cfg_set);
int iSetSC_I2C_CTRL_SET_i2c0_dat_mux_sel_set(unsigned int ui2c0_dat_mux_sel_set);
int iSetSC_I2C_CTRL_SET_i2c0_scl_cfg_set(unsigned int ui2c0_scl_cfg_set);
int iSetSC_I2C_CTRL_SET_i2c0_clk_oe_cfg_set(unsigned int ui2c0_clk_oe_cfg_set);
int iSetSC_I2C_CTRL_SET_i2c0_clk_mux_sel_set(unsigned int ui2c0_clk_mux_sel_set);
int iSetSC_I2C_CTRL_CLR_smbus_sda_cfg_clr(unsigned int usmbus_sda_cfg_clr);
int iSetSC_I2C_CTRL_CLR_smbus_dat_oe_cfg_clr(unsigned int usmbus_dat_oe_cfg_clr);
int iSetSC_I2C_CTRL_CLR_smbus_dat_mux_sel_clr(unsigned int usmbus_dat_mux_sel_clr);
int iSetSC_I2C_CTRL_CLR_smbus_scl_cfg_clr(unsigned int usmbus_scl_cfg_clr);
int iSetSC_I2C_CTRL_CLR_smbus_clk_oe_cfg_clr(unsigned int usmbus_clk_oe_cfg_clr);
int iSetSC_I2C_CTRL_CLR_smbus_clk_mux_sel_clr(unsigned int usmbus_clk_mux_sel_clr);
int iSetSC_I2C_CTRL_CLR_i2c0_sda_cfg_clr(unsigned int ui2c0_sda_cfg_clr);
int iSetSC_I2C_CTRL_CLR_i2c0_dat_oe_cfg_clr(unsigned int ui2c0_dat_oe_cfg_clr);
int iSetSC_I2C_CTRL_CLR_i2c0_dat_mux_sel_clr(unsigned int ui2c0_dat_mux_sel_clr);
int iSetSC_I2C_CTRL_CLR_i2c0_scl_cfg_clr(unsigned int ui2c0_scl_cfg_clr);
int iSetSC_I2C_CTRL_CLR_i2c0_clk_oe_cfg_clr(unsigned int ui2c0_clk_oe_cfg_clr);
int iSetSC_I2C_CTRL_CLR_i2c0_clk_mux_sel_clr(unsigned int ui2c0_clk_mux_sel_clr);
int iSetSC_DDR_RETENTION_sc_ddr_retention(unsigned int usc_ddr_retention);
int iSetSC_DDR_RESET_ACK_CTRL_sc_warm_rst_ack_en_ddr(unsigned int usc_warm_rst_ack_en_ddr);
int iSetSC_ARM_JTAG_SEL_arm_jtag_sel(unsigned int uarm_jtag_sel);
int iSetSC_DBGACK_EN_dbgack_en(unsigned int udbgack_en);
int iSetSC_DISPATCH_ERRRSP_errrsp_disable(unsigned int uerrrsp_disable);
int iSetSC_SCH_S3_USER_CTRL0_sc_aruser_31_0(unsigned int usc_aruser_31_0);
int iSetSC_SCH_S3_USER_CTRL1_sch_s3_aruser_63_32(unsigned int usch_s3_aruser_63_32);
int iSetSC_SCH_S3_USER_CTRL2_sch_s3_wuser(unsigned int usch_s3_wuser);
int iSetSC_SCH_S3_USER_CTRL2_sch_s3_awqos(unsigned int usch_s3_awqos);
int iSetSC_SCH_S3_USER_CTRL2_sch_s3_arqos(unsigned int usch_s3_arqos);
int iSetSC_SCH_S3_USER_CTRL2_sch_s3_aruser_67_64(unsigned int usch_s3_aruser_67_64);
int iSetSC_SCH_S3_USER_CTRL3_sc_awuser_31_0(unsigned int usc_awuser_31_0);
int iSetSC_SCH_S3_USER_CTRL4_sch_s3_awuser_63_32(unsigned int usch_s3_awuser_63_32);
int iSetSC_SCH_S3_USER_CTRL5_sch_s3_awuser_67_64(unsigned int usch_s3_awuser_67_64);
int iSetSC_AO_RESET_CTRL_DDR_ao_reset_ctrl_ddr1(unsigned int uao_reset_ctrl_ddr1);
int iSetSC_DDR_MODE_CTRL_byp_mode_ddrc7(unsigned int ubyp_mode_ddrc7);
int iSetSC_DDR_MODE_CTRL_byp_mode_ddrc6(unsigned int ubyp_mode_ddrc6);
int iSetSC_DDR_MODE_CTRL_byp_mode_ddrc5(unsigned int ubyp_mode_ddrc5);
int iSetSC_DDR_MODE_CTRL_byp_mode_ddrc4(unsigned int ubyp_mode_ddrc4);
int iSetSC_TIMER_CLK_SEL_timer_clk_sel(unsigned int utimer_clk_sel);
int iSetSC_WDG_CLK_SEL_wdg_clk_sel(unsigned int uwdg_clk_sel);
int iSetSC_SFC_CLK_SEL_sfc_clk_sel(unsigned int usfc_clk_sel);
int iSetSC_TIMER_EN_EXTERNAL_sc_timer_en_external(unsigned int usc_timer_en_external);
int iSetSC_USB3_CTRL0_usb3_bus_filter_bypass(unsigned int uusb3_bus_filter_bypass);
int iSetSC_USB3_CTRL1_usb3_fladj_30mhz_reg(unsigned int uusb3_fladj_30mhz_reg);
int iSetSC_USB3_CTRL5_usb3_ref_clkdiv2(unsigned int uusb3_ref_clkdiv2);
int iSetSC_USB3_CTRL6_pme_en(unsigned int upme_en);
int iSetSC_USB3_CTRL6_gp_in(unsigned int ugp_in);
int iSetSC_USB3_CTRL6_sc_usb3_bigendian(unsigned int usc_usb3_bigendian);
int iSetSC_USB3_CTRL6_sc_usb3_utmiotg_dmpulldown(unsigned int usc_usb3_utmiotg_dmpulldown);
int iSetSC_USB3_CTRL6_sc_usb3_utmiotg_dppulldown(unsigned int usc_usb3_utmiotg_dppulldown);
int iSetSC_USB3_RAM_ECC_EN_sc_usb3_ram_ecc_en(unsigned int usc_usb3_ram_ecc_en);
int iSetSC_USB3_RAM_ECC_CLR_sc_usb3_ram_ecc_clr(unsigned int usc_usb3_ram_ecc_clr);
int iSetSC_UTMI_CLK_SEL_sc_utmi_clk_sel(unsigned int usc_utmi_clk_sel);
int iSetSC_M2_PAD_OE_m2_pewake_n_oen(unsigned int um2_pewake_n_oen);
int iSetSC_M2_PAD_OE_m2_clkreq_n_oen(unsigned int um2_clkreq_n_oen);
int iSetSC_JTAG_AUTH_CTRL0_sc2ja_selftest_enb(unsigned int usc2ja_selftest_enb);
int iSetSC_JTAG_AUTH_CTRL1_heart_beat_num(unsigned int uheart_beat_num);
int iSetSC_JTAG_AUTH_CTRL2_sc2ja_emsa_pss_sel(unsigned int usc2ja_emsa_pss_sel);
int iSetSC_CFG_BW_CTRL_sc_overflow_cpu_mux(unsigned int usc_overflow_cpu_mux);
int iSetSC_CFG_BW_CTRL_sc_cfg_bwc_en(unsigned int usc_cfg_bwc_en);
int iSetSC_CFG_BW_CTRL_sc_cfg_bwc_saturation(unsigned int usc_cfg_bwc_saturation);
int iSetSC_CFG_BW_CTRL_sc_cfg_bwc_bandwidth(unsigned int usc_cfg_bwc_bandwidth);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_dvpp(unsigned int urepair_load_rstn_dvpp);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_pcie(unsigned int urepair_load_rstn_pcie);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_peri_llc_hha(unsigned int urepair_load_rstn_peri_llc_hha);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_pcie_io(unsigned int urepair_load_rstn_pcie_io);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_ddr0(unsigned int urepair_load_rstn_ddr0);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_ddr1(unsigned int urepair_load_rstn_ddr1);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_cpu_cluster(unsigned int urepair_load_rstn_cpu_cluster);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_ts(unsigned int urepair_load_rstn_ts);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_dvpp_l2buf(unsigned int urepair_load_rstn_dvpp_l2buf);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_a55_0(unsigned int urepair_load_rstn_a55_0);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_a55_1(unsigned int urepair_load_rstn_a55_1);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_a55_2(unsigned int urepair_load_rstn_a55_2);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_a55_3(unsigned int urepair_load_rstn_a55_3);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_a55_4(unsigned int urepair_load_rstn_a55_4);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_a55_5(unsigned int urepair_load_rstn_a55_5);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_a55_6(unsigned int urepair_load_rstn_a55_6);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_a55_7(unsigned int urepair_load_rstn_a55_7);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_aic_0(unsigned int urepair_load_rstn_aic_0);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_aic_1(unsigned int urepair_load_rstn_aic_1);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_aic_2(unsigned int urepair_load_rstn_aic_2);
int iSetSC_REPAIR_LOAD_RSTN_repair_load_rstn_aic_3(unsigned int urepair_load_rstn_aic_3);
int iSetSC_INT_WAKE_MASK_timer_int_mask(unsigned int utimer_int_mask);
int iSetSC_INT_WAKE_MASK_pcie_int_mask(unsigned int upcie_int_mask);
int iSetSC_INT_WAKE_MASK_gpio_int_mask(unsigned int ugpio_int_mask);
int iSetSC_USB3_PHY_CFG0_sc_usb3_phy_txrisetune0(unsigned int usc_usb3_phy_txrisetune0);
int iSetSC_USB3_PHY_CFG0_sc_usb3_phy_txrestune0(unsigned int usc_usb3_phy_txrestune0);
int iSetSC_USB3_PHY_CFG0_sc_usb3_phy_txpreemppulsetune0(unsigned int usc_usb3_phy_txpreemppulsetune0);
int iSetSC_USB3_PHY_CFG0_sc_usb3_phy_txpreempamptune0(unsigned int usc_usb3_phy_txpreempamptune0);
int iSetSC_USB3_PHY_CFG0_sc_usb3_phy_txhsxvtune0(unsigned int usc_usb3_phy_txhsxvtune0);
int iSetSC_USB3_PHY_CFG0_sc_usb3_phy_txfslstune0(unsigned int usc_usb3_phy_txfslstune0);
int iSetSC_USB3_PHY_CFG0_sc_usb3_phy_sqrxtune0(unsigned int usc_usb3_phy_sqrxtune0);
int iSetSC_USB3_PHY_CFG0_sc_usb3_phy_refclksel(unsigned int usc_usb3_phy_refclksel);
int iSetSC_USB3_PHY_CFG0_sc_usb3_phy_otgtune0(unsigned int usc_usb3_phy_otgtune0);
int iSetSC_USB3_PHY_CFG0_sc_usb3_phy_otgdisable0(unsigned int usc_usb3_phy_otgdisable0);
int iSetSC_USB3_PHY_CFG0_sc_usb3_phy_loopbackenb0(unsigned int usc_usb3_phy_loopbackenb0);
int iSetSC_USB3_PHY_CFG0_sc_usb3_phy_idpullup0(unsigned int usc_usb3_phy_idpullup0);
int iSetSC_USB3_PHY_CFG0_sc_usb3_phy_drvvbus0(unsigned int usc_usb3_phy_drvvbus0);
int iSetSC_USB3_PHY_CFG0_sc_usb3_phy_compdistune0(unsigned int usc_usb3_phy_compdistune0);
int iSetSC_USB3_PHY_CFG0_sc_usb3_phy_commononn(unsigned int usc_usb3_phy_commononn);
int iSetSC_USB3_PHY_CFG1_sc_usb3_phy_iddig0(unsigned int usc_usb3_phy_iddig0);
int iSetSC_USB3_PHY_CFG1_sc_usb3_phy_fsel(unsigned int usc_usb3_phy_fsel);
int iSetSC_USB3_PHY_CFG1_sc_usb3_phy_tx_vboost_lvl(unsigned int usc_usb3_phy_tx_vboost_lvl);
int iSetSC_USB3_PHY_CFG1_sc_usb3_phy_teste_powerdown_ssp(unsigned int usc_usb3_phy_teste_powerdown_ssp);
int iSetSC_USB3_PHY_CFG1_sc_usb3_phy_teste_powerdown_hsp(unsigned int usc_usb3_phy_teste_powerdown_hsp);
int iSetSC_USB3_PHY_CFG1_sc_usb3_phy_teste_burnin(unsigned int usc_usb3_phy_teste_burnin);
int iSetSC_USB3_PHY_CFG1_sc_usb3_phy_ref_use_pad(unsigned int usc_usb3_phy_ref_use_pad);
int iSetSC_USB3_PHY_CFG1_sc_usb3_phy_ref_ssp_en(unsigned int usc_usb3_phy_ref_ssp_en);
int iSetSC_USB3_PHY_CFG1_sc_usb3_phy_vdatsrcenb0(unsigned int usc_usb3_phy_vdatsrcenb0);
int iSetSC_USB3_PHY_CFG1_sc_usb3_phy_vdatdetenb0(unsigned int usc_usb3_phy_vdatdetenb0);
int iSetSC_USB3_PHY_CFG1_sc_usb3_phy_vdatreftune0(unsigned int usc_usb3_phy_vdatreftune0);
int iSetSC_USB3_PHY_CFG1_sc_usb3_phy_vbusvldextsel0(unsigned int usc_usb3_phy_vbusvldextsel0);
int iSetSC_USB3_PHY_CFG1_sc_usb3_phy_vbusvldext0(unsigned int usc_usb3_phy_vbusvldext0);
int iSetSC_USB3_PHY_CFG1_sc_usb3_phy_txvreftune0(unsigned int usc_usb3_phy_txvreftune0);
int iSetSC_USB3_PHY_CFG2_sc_usb3_phy_cr_data_in(unsigned int usc_usb3_phy_cr_data_in);
int iSetSC_USB3_PHY_CFG2_sc_usb3_phy_cr_write(unsigned int usc_usb3_phy_cr_write);
int iSetSC_USB3_PHY_CFG2_sc_usb3_phy_cr_read(unsigned int usc_usb3_phy_cr_read);
int iSetSC_USB3_PHY_CFG2_sc_usb3_phy_cr_cap_dat(unsigned int usc_usb3_phy_cr_cap_dat);
int iSetSC_USB3_PHY_CFG2_sc_usb3_phy_cr_cap_addr(unsigned int usc_usb3_phy_cr_cap_addr);
int iSetSC_USB3_PHY_CFG3_sc_usb3_phy_cr_data_out(unsigned int usc_usb3_phy_cr_data_out);
int iSetSC_USB3_PHY_CFG3_sc_usb3_phy_cr_ack(unsigned int usc_usb3_phy_cr_ack);
int iSetSC_USB3_PHY_CFG4_sc_usb3_phy_lane0_tx_term_offset(unsigned int usc_usb3_phy_lane0_tx_term_offset);
int iSetSC_USB3_PHY_CFG4_sc_usb3_phy_lane0_tx2rx_loopbk(unsigned int usc_usb3_phy_lane0_tx2rx_loopbk);
int iSetSC_USB3_PHY_CFG4_sc_usb3_phy_clane0_ext_pclk_req(unsigned int usc_usb3_phy_clane0_ext_pclk_req);
int iSetSC_USB3_PHY_CFG5_sc_usb3_phy_los_level(unsigned int usc_usb3_phy_los_level);
int iSetSC_USB3_PHY_CFG5_sc_usb3_phy_los_bias(unsigned int usc_usb3_phy_los_bias);
int iSetSC_USB3_PHY_CFG6_sc_usb3_phy_mpll_multiplier(unsigned int usc_usb3_phy_mpll_multiplier);
int iSetSC_USB3_PHY_CFG6_sc_usb3_phy_mpll_refssc_clk_en(unsigned int usc_usb3_phy_mpll_refssc_clk_en);
int iSetSC_USB3_PHY_CFG7_sc_usb3_phy_pcs_tx_full(unsigned int usc_usb3_phy_pcs_tx_full);
int iSetSC_USB3_PHY_CFG7_sc_usb3_phy_pcs_tx_deemph_6db(unsigned int usc_usb3_phy_pcs_tx_deemph_6db);
int iSetSC_USB3_PHY_CFG7_sc_usb3_phy_pcs_tx_deemph_3p5db(unsigned int usc_usb3_phy_pcs_tx_deemph_3p5db);
int iSetSC_USB3_PHY_CFG7_sc_usb3_phy_pcs_rx_los_mask_val(unsigned int usc_usb3_phy_pcs_rx_los_mask_val);
int iSetSC_USB3_PHY_CFG8_sc_usb3_phy_rtune_ack(unsigned int usc_usb3_phy_rtune_ack);
int iSetSC_USB3_PHY_CFG8_sc_usb3_phy_rtune_req(unsigned int usc_usb3_phy_rtune_req);
int iSetSC_USB3_PHY_CFG9_sc_usb3_phy_rx0loslfpsen(unsigned int usc_usb3_phy_rx0loslfpsen);
int iSetSC_USB3_PHY_CFG9_sc_usb3_phy_retenablen(unsigned int usc_usb3_phy_retenablen);
int iSetSC_USB3_PHY_CFG9_sc_usb3_phy_ssc_ref_clk_sel(unsigned int usc_usb3_phy_ssc_ref_clk_sel);
int iSetSC_USB3_PHY_CFG9_sc_usb3_phy_ssc_range(unsigned int usc_usb3_phy_ssc_range);
int iSetSC_USB3_PHY_CFG9_sc_usb3_phy_ssc_en(unsigned int usc_usb3_phy_ssc_en);
int iSetSC_USB3_PHY_CFG10_bypassdpdata(unsigned int ubypassdpdata);
int iSetSC_USB3_PHY_CFG10_bypassdmdata(unsigned int ubypassdmdata);
int iSetSC_USB3_PHY_CFG10_bypassdpen(unsigned int ubypassdpen);
int iSetSC_USB3_PHY_CFG10_bypassdmen(unsigned int ubypassdmen);
int iSetSC_USB3_PHY_CFG10_bypasssel(unsigned int ubypasssel);
int iSetSC_USB3_PHY_CFG10_autorsmenb(unsigned int uautorsmenb);
int iSetSC_USB3_PHY_CFG11_vatestenb(unsigned int uvatestenb);
int iSetSC_USB3_PHY_CFG11_alt_clk_en(unsigned int ualt_clk_en);
int iSetSC_USB3_PHY_CFG11_alt_clk_sel(unsigned int ualt_clk_sel);
int iSetSC_USB3_PHY_CFG11_alt_pcs_clk(unsigned int ualt_pcs_clk);
int iSetSC_USB3_PHY_CFG11_alt_pipe_clk(unsigned int ualt_pipe_clk);
int iSetSC_USB3_PHY_CFG11_ref_repeat_clk_en(unsigned int uref_repeat_clk_en);
int iSetSC_USB3_PHY_CFG11_ref_use_xo(unsigned int uref_use_xo);
int iSetSC_USB3_PHY_CFG11_ref_xo_en(unsigned int uref_xo_en);
int iSetSC_USB3_PHY_CFG11_dcdenb(unsigned int udcdenb);
int iSetSC_USB3_PHY_CFG11_chrgsel(unsigned int uchrgsel);
int iSetSC_USB3_PHY_CFG11_chrgsrcpuenb(unsigned int uchrgsrcpuenb);
int iSetSC_USB3_PHY_CFG12_txbitstuffen0(unsigned int utxbitstuffen0);
int iSetSC_USB3_PHY_CFG12_txbitstuffenh0(unsigned int utxbitstuffenh0);
int iSetSC_USB3_PHY_CFG12_hsxcvrextctl(unsigned int uhsxcvrextctl);
int iSetSC_USB3_PHY_CFG12_fsdataext(unsigned int ufsdataext);
int iSetSC_USB3_PHY_CFG12_fsse0ext(unsigned int ufsse0ext);
int iSetSC_USB3_PHY_CFG12_fsxcvrowner(unsigned int ufsxcvrowner);
int iSetSC_USB3_PHY_CFG12_txenablen(unsigned int utxenablen);
int iSetSC_PMURST_CTRL_sc_io_rst_out_n_oen(unsigned int usc_io_rst_out_n_oen);
int iSetSC_PMURST_CTRL_sc_pmurst_ctrl(unsigned int usc_pmurst_ctrl);
int iSetSC_RST_CTRL_sc_pcie_rst_bypass(unsigned int usc_pcie_rst_bypass);
int iSetSC_RST_CTRL_sc_devrst_ctrl(unsigned int usc_devrst_ctrl);
int iSetSC_RST_CTRL_sc_rst_dram_ctrl(unsigned int usc_rst_dram_ctrl);
int iSetSC_RST_CTRL_soft_rst_dram_dis(unsigned int usoft_rst_dram_dis);
int iSetSC_WAIT_DDR_SELFREFLASH_BYPASS_sc_wait_ddr_selfreflash_doneb_ypass(unsigned int usc_wait_ddr_selfreflash_doneb_ypass);
int iSetSC_MEM_CTRL_SP_SRAM_sp_ram_tmod_sram(unsigned int usp_ram_tmod_sram);
int iSetSC_MEM_CTRL_RGMII_rgmii_ecc_bypass(unsigned int urgmii_ecc_bypass);
int iSetSC_MEM_CTRL_RGMII_rgmii_tp_ram_tmod(unsigned int urgmii_tp_ram_tmod);
int iSetSC_MEM_CTRL_RGMII_rgmii_sp_ram_tmod(unsigned int urgmii_sp_ram_tmod);
int iSetSC_MEM_CTRL_RGMII_rgmii_tp_ram_power_mode(unsigned int urgmii_tp_ram_power_mode);
int iSetSC_MEM_CTRL_RGMII_rgmii_sp_ram_power_mode(unsigned int urgmii_sp_ram_power_mode);
int iSetSC_MEM_CTRL_SMMU_smmu_mem_power_mode(unsigned int usmmu_mem_power_mode);
int iSetSC_MEM_CTRL_SMMU_smmu_sp_ram_tmod(unsigned int usmmu_sp_ram_tmod);
int iSetSC_MEM_CTRL0_USB3_usb_ram3_ecc_bypass(unsigned int uusb_ram3_ecc_bypass);
int iSetSC_MEM_CTRL0_USB3_usb_ram2_ecc_bypass(unsigned int uusb_ram2_ecc_bypass);
int iSetSC_MEM_CTRL0_USB3_usb_ram1_ecc_bypass(unsigned int uusb_ram1_ecc_bypass);
int iSetSC_MEM_CTRL0_USB3_usb_ram0_ecc_bypass(unsigned int uusb_ram0_ecc_bypass);
int iSetSC_MEM_CTRL0_USB3_usb_tp_ram2_tmod(unsigned int uusb_tp_ram2_tmod);
int iSetSC_MEM_CTRL0_USB3_usb_tp_ram1_tmod(unsigned int uusb_tp_ram1_tmod);
int iSetSC_MEM_CTRL0_USB3_usb_tp_ram0_tmod(unsigned int uusb_tp_ram0_tmod);
int iSetSC_MEM_CTRL1_USB3_mem_power_mode_ram2_usb(unsigned int umem_power_mode_ram2_usb);
int iSetSC_MEM_CTRL1_USB3_mem_power_mode_ram1_usb(unsigned int umem_power_mode_ram1_usb);
int iSetSC_MEM_CTRL1_USB3_mem_power_mode_ram0_usb(unsigned int umem_power_mode_ram0_usb);
int iSetSC_MEM_CTRL2_USB3_usb_tp_ram3_tmod(unsigned int uusb_tp_ram3_tmod);
int iSetSC_MEM_CTRL2_USB3_mem_power_mode_ram3_usb(unsigned int umem_power_mode_ram3_usb);
int iSetSC_JTAG_AUTH_MEM_CTRL_jtag_auth_sp_ram_tmod(unsigned int ujtag_auth_sp_ram_tmod);
int iSetSC_JTAG_AUTH_MEM_CTRL_jtag_auth_sp_ram_power_mode(unsigned int ujtag_auth_sp_ram_power_mode);
int iSetSC_BOOTROM_TIMING_sc_bootrom_timing(unsigned int usc_bootrom_timing);
int iSetSC_RGMII_BYP_CTRL_sc_byp_en_spmi(unsigned int usc_byp_en_spmi);
int iSetSC_RGMII_BYP_CTRL_sc_byp_en_rgmii_bus(unsigned int usc_byp_en_rgmii_bus);
int iSetSC_BAK_DATA0_sc_bak_data0(unsigned int usc_bak_data0);
int iSetSC_BAK_DATA1_sc_bak_data1(unsigned int usc_bak_data1);
int iSetSC_BAK_DATA2_sc_bak_data2(unsigned int usc_bak_data2);
int iSetSC_BAK_DATA3_sc_bak_data3(unsigned int usc_bak_data3);
int iSetSC_BAK_DATA4_sc_bak_data4(unsigned int usc_bak_data4);
int iSetSC_BAK_DATA5_sc_bak_data5(unsigned int usc_bak_data5);
int iSetSC_BAK_DATA6_sc_bak_data6(unsigned int usc_bak_data6);
int iSetSC_BAK_DATA7_sc_bak_data7(unsigned int usc_bak_data7);
int iSetSC_BAK_DATA8_sc_bak_data8(unsigned int usc_bak_data8);
int iSetSC_BAK_DATA9_sc_bak_data9(unsigned int usc_bak_data9);
int iSetSC_BAK_DATA10_sc_bak_data10(unsigned int usc_bak_data10);
int iSetSC_BAK_DATA11_sc_bak_data11(unsigned int usc_bak_data11);
int iSetSC_BAK_DATA12_sc_bak_data12(unsigned int usc_bak_data12);
int iSetSC_BAK_DATA13_sc_bak_data13(unsigned int usc_bak_data13);
int iSetSC_BAK_DATA14_sc_bak_data14(unsigned int usc_bak_data14);
int iSetSC_BAK_DATA15_sc_bak_data15(unsigned int usc_bak_data15);
int iSetSC_MBIST_CPUI_ENABLE_func_mbist_enable(unsigned int ufunc_mbist_enable);
int iSetSC_MBIST_CPUI_DATAIN_func_mbist_wdata(unsigned int ufunc_mbist_wdata);
int iSetSC_MBIST_CPUI_WRITE_EN_func_mbist_wr_enable(unsigned int ufunc_mbist_wr_enable);
int iSetSC_MBIST_CPUI_SMS_FUNC_RESET_func_mbist_reset_n(unsigned int ufunc_mbist_reset_n);
int iSetSC_MBIST_CPUI_FUNC_RESET_mbist_req_fcm_ts(unsigned int umbist_req_fcm_ts);
int iSetSC_MBIST_CPUI_FUNC_RESET_mbist_req_aicore1(unsigned int umbist_req_aicore1);
int iSetSC_MBIST_CPUI_FUNC_RESET_mbist_req_aicore0(unsigned int umbist_req_aicore0);
int iSetSC_MBIST_CPUI_FUNC_RESET_mbist_req_l2buff1(unsigned int umbist_req_l2buff1);
int iSetSC_MBIST_CPUI_FUNC_RESET_mbist_req_l2buff0(unsigned int umbist_req_l2buff0);
int iSetSC_MBIST_CPUI_FUNC_RESET_mbist_req_cpu_cluster(unsigned int umbist_req_cpu_cluster);
int iSetSC_RGMII_WADDR_CTRL_rgmii_waddr_ctrl(unsigned int urgmii_waddr_ctrl);
int iSetSC_RGMII_RADDR_CTRL_rgmii_raddr_ctrl(unsigned int urgmii_raddr_ctrl);
int iSetSC_CFG_AWUSER_L_RGMII_sc_cfg_awuser_l_rgmii(unsigned int usc_cfg_awuser_l_rgmii);
int iSetSC_CFG_AWUSER_M_RGMII_sc_cfg_awuser_m_rgmii(unsigned int usc_cfg_awuser_m_rgmii);
int iSetSC_CFG_AWUSER_H_RGMII_sc_cfg_awuser_h_rgmii(unsigned int usc_cfg_awuser_h_rgmii);
int iSetSC_CFG_ARUSER_L_RGMII_sc_cfg_aruser_l_rgmii(unsigned int usc_cfg_aruser_l_rgmii);
int iSetSC_CFG_ARUSER_M_RGMII_sc_cfg_aruser_m_rgmii(unsigned int usc_cfg_aruser_m_rgmii);
int iSetSC_CFG_ARUSER_H_RGMII_sc_cfg_aruser_h_rgmii(unsigned int usc_cfg_aruser_h_rgmii);
int iSetSC_CFG_QOS_CTRL_RGMII_sc_cfg_awqos_rgmii(unsigned int usc_cfg_awqos_rgmii);
int iSetSC_CFG_QOS_CTRL_RGMII_sc_cfg_arqos_rgmii(unsigned int usc_cfg_arqos_rgmii);
int iSetSC_CFG_QOS_OVERFLOW_EN_sc_cfg_qos_overflow_en(unsigned int usc_cfg_qos_overflow_en);
int iSetSC_CFG_QOS_BACKPRESSURE_EN_sc_cfg_qos_backpressure_en(unsigned int usc_cfg_qos_backpressure_en);
int iSetSC_CFG_QOS_BACKPRESSURE_VALID_sc_cfg_qos_backpressure_valid(unsigned int usc_cfg_qos_backpressure_valid);
int iSetSC_CFG_QOS_EXTEND_CYCLE_NUM_sc_cfg_qos_extend_cycle_num(unsigned int usc_cfg_qos_extend_cycle_num);
int iSetSC_CFG_QOS_VALID_INDICATE_sc_cfg_qos_valid_indicate(unsigned int usc_cfg_qos_valid_indicate);
int iSetSC_CFG_QOS_OVERFLOW_DDR_sc_cfg_qos_overflow_ddr_level2(unsigned int usc_cfg_qos_overflow_ddr_level2);
int iSetSC_CFG_QOS_OVERFLOW_DDR_sc_cfg_qos_overflow_ddr_level1(unsigned int usc_cfg_qos_overflow_ddr_level1);
int iSetSC_CFG_QOS_BACKPRESSURE_SEL_sc_cfg_qos_backpressure_select_level2(unsigned int usc_cfg_qos_backpressure_select_level2);
int iSetSC_CFG_QOS_BACKPRESSURE_SEL_sc_cfg_qos_backpressure_select_level1(unsigned int usc_cfg_qos_backpressure_select_level1);
int iSetSC_DDR_RETETION_CLR_sc_dram_reteion_clr(unsigned int usc_dram_reteion_clr);
int iSetSC_RST_SRC_CLR_sc_rst_src_clr(unsigned int usc_rst_src_clr);
int iSetSC_AI0_SVFD_CFG0_ai0_svfd_div64_en(unsigned int uai0_svfd_div64_en);
int iSetSC_AI0_SVFD_CFG0_ai0_svfd_glitch_test(unsigned int uai0_svfd_glitch_test);
int iSetSC_AI0_SVFD_CFG0_ai0_svfd_match_detect(unsigned int uai0_svfd_match_detect);
int iSetSC_AI0_SVFD_CFG0_ai0_svfd_trim(unsigned int uai0_svfd_trim);
int iSetSC_AI0_SVFD_CFG0_ai0_svfd_on_mode(unsigned int uai0_svfd_on_mode);
int iSetSC_AI0_SVFD_CFG0_ai0_svfd_off_mode(unsigned int uai0_svfd_off_mode);
int iSetSC_AI0_SVFD_CFG0_ai0_svfd_d_rate(unsigned int uai0_svfd_d_rate);
int iSetSC_AI0_SVFD_CFG0_ai0_svfd_vdm_mod(unsigned int uai0_svfd_vdm_mod);
int iSetSC_AI0_SVFD_CFG1_ai0_svfd_test_in(unsigned int uai0_svfd_test_in);
int iSetSC_AI0_SVFD_CFG1_ai0_svfd_cpm_out_div_sel(unsigned int uai0_svfd_cpm_out_div_sel);
int iSetSC_AI0_SVFD_CFG1_ai0_svfd_cpm_data_limit_e(unsigned int uai0_svfd_cpm_data_limit_e);
int iSetSC_AI0_SVFD_CFG1_ai0_svfd_cpm_data_mode(unsigned int uai0_svfd_cpm_data_mode);
int iSetSC_AI0_SVFD_CFG1_ai0_svfd_cpm_edge_sel(unsigned int uai0_svfd_cpm_edge_sel);
int iSetSC_AI0_SVFD_CFG1_ai0_svfd_cpm_vdm_period(unsigned int uai0_svfd_cpm_vdm_period);
int iSetSC_AI0_SVFD_CFG2_ai0_svfd_lvt_ll(unsigned int uai0_svfd_lvt_ll);
int iSetSC_AI0_SVFD_CFG2_ai0_svfd_lvt_sl(unsigned int uai0_svfd_lvt_sl);
int iSetSC_AI0_SVFD_CFG2_ai0_svfd_ulvt_ll(unsigned int uai0_svfd_ulvt_ll);
int iSetSC_AI0_SVFD_CFG2_ai0_svfd_ulvt_sl(unsigned int uai0_svfd_ulvt_sl);
int iSetSC_AI1_SVFD_CFG0_ai1_svfd_div64_en(unsigned int uai1_svfd_div64_en);
int iSetSC_AI1_SVFD_CFG0_ai1_svfd_glitch_test(unsigned int uai1_svfd_glitch_test);
int iSetSC_AI1_SVFD_CFG0_ai1_svfd_match_detect(unsigned int uai1_svfd_match_detect);
int iSetSC_AI1_SVFD_CFG0_ai1_svfd_trim(unsigned int uai1_svfd_trim);
int iSetSC_AI1_SVFD_CFG0_ai1_svfd_on_mode(unsigned int uai1_svfd_on_mode);
int iSetSC_AI1_SVFD_CFG0_ai1_svfd_off_mode(unsigned int uai1_svfd_off_mode);
int iSetSC_AI1_SVFD_CFG0_ai1_svfd_d_rate(unsigned int uai1_svfd_d_rate);
int iSetSC_AI1_SVFD_CFG0_ai1_svfd_vdm_mod(unsigned int uai1_svfd_vdm_mod);
int iSetSC_AI1_SVFD_CFG1_ai1_svfd_test_in(unsigned int uai1_svfd_test_in);
int iSetSC_AI1_SVFD_CFG1_ai1_svfd_cpm_out_div_sel(unsigned int uai1_svfd_cpm_out_div_sel);
int iSetSC_AI1_SVFD_CFG1_ai1_svfd_cpm_data_limit_e(unsigned int uai1_svfd_cpm_data_limit_e);
int iSetSC_AI1_SVFD_CFG1_ai1_svfd_cpm_data_mode(unsigned int uai1_svfd_cpm_data_mode);
int iSetSC_AI1_SVFD_CFG1_ai1_svfd_cpm_edge_sel(unsigned int uai1_svfd_cpm_edge_sel);
int iSetSC_AI1_SVFD_CFG1_ai1_svfd_cpm_vdm_period(unsigned int uai1_svfd_cpm_vdm_period);
int iSetSC_AI1_SVFD_CFG2_ai1_svfd_lvt_ll(unsigned int uai1_svfd_lvt_ll);
int iSetSC_AI1_SVFD_CFG2_ai1_svfd_lvt_sl(unsigned int uai1_svfd_lvt_sl);
int iSetSC_AI1_SVFD_CFG2_ai1_svfd_ulvt_ll(unsigned int uai1_svfd_ulvt_ll);
int iSetSC_AI1_SVFD_CFG2_ai1_svfd_ulvt_sl(unsigned int uai1_svfd_ulvt_sl);
int iSetSC_AI0_SVFD_BYPASS_ai0_svfd_bypass(unsigned int uai0_svfd_bypass);
int iSetSC_AI1_SVFD_BYPASS_ai1_svfd_bypass(unsigned int uai1_svfd_bypass);
int iSetSC_CPU_CRG_CTRL_cpu_idle_div_bypass(unsigned int ucpu_idle_div_bypass);
int iSetSC_CPU_CRG_CTRL_cpu_div_cfg(unsigned int ucpu_div_cfg);
int iSetSC_CPU_CRG_CTRL_cpu_div_idle_cfg(unsigned int ucpu_div_idle_cfg);
int iSetSC_CPU_CRG_CTRL_cpu_auto_wait_in_cfg(unsigned int ucpu_auto_wait_in_cfg);
int iSetSC_CPU_CRG_CTRL_cpu_auto_wait_out_cfg(unsigned int ucpu_auto_wait_out_cfg);
int iSetSC_PLL_PROF_CFG0_pll0_clk_div_cfg_emmc(unsigned int upll0_clk_div_cfg_emmc);
int iSetSC_PLL_PROF_CFG0_pll0_prof_clk_div_cfg_aicore(unsigned int upll0_prof_clk_div_cfg_aicore);
int iSetSC_PLL_PROF_CFG0_pll2_prof_clk_div_cfg(unsigned int upll2_prof_clk_div_cfg);
int iSetSC_PLL_PROF_CFG0_pll1_prof_clk_div_cfg(unsigned int upll1_prof_clk_div_cfg);
int iSetSC_PLL_PROF_CFG0_pll0_prof_clk_div_cfg(unsigned int upll0_prof_clk_div_cfg);
int iSetSC_CFG_USBCTRL_SEL_sc_cfg_usbctrl_sel(unsigned int usc_cfg_usbctrl_sel);
int iSetSC_PLL_PROF_CFG1_pll5_prof_clk_div_cfg(unsigned int upll5_prof_clk_div_cfg);
int iSetSC_PLL_PROF_CFG1_pll4_prof_clk_div_cfg(unsigned int upll4_prof_clk_div_cfg);
int iSetSC_PLL_PROF_CFG1_pll3_prof_clk_div_cfg(unsigned int upll3_prof_clk_div_cfg);
int iSetSC_UTMI_WORD_IF_sc_utmi_word_if(unsigned int usc_utmi_word_if);
int iSetSC_BIAS_CTRL_sc_pg_bias1(unsigned int usc_pg_bias1);
int iSetSC_BIAS_CTRL_sc_pg_bias0(unsigned int usc_pg_bias0);
int iSetSC_BIAS_CTRL_sc_msc_bias1(unsigned int usc_msc_bias1);
int iSetSC_BIAS_CTRL_sc_msc_bias0(unsigned int usc_msc_bias0);
int iSetSC_RGMII_SRC_INT_gmiirx0_ecc_multi_err(unsigned int ugmiirx0_ecc_multi_err);
int iSetSC_RGMII_SRC_INT_rdopt_ecc_multi_err(unsigned int urdopt_ecc_multi_err);
int iSetSC_RGMII_SRC_INT_wropt_ecc_multi_err(unsigned int uwropt_ecc_multi_err);
int iSetSC_RGMII_SRC_INT_coretx0_ecc_multi_err(unsigned int ucoretx0_ecc_multi_err);
int iSetSC_RGMII_SRC_INT_corerx0_ecc_multi_err(unsigned int ucorerx0_ecc_multi_err);
int iSetSC_RGMII_SRC_INT_macdio0_ecc_multi_err(unsigned int umacdio0_ecc_multi_err);
int iSetSC_RGMII_SRC_INT_pmutx0_ecc_multi_err(unsigned int upmutx0_ecc_multi_err);
int iSetSC_RGMII_SRC_INT_pmurx0_ecc_multi_err(unsigned int upmurx0_ecc_multi_err);
int iSetSC_RGMII_SRC_INT_pmudesc03_ecc_multi_err(unsigned int upmudesc03_ecc_multi_err);
int iSetSC_RGMII_SRC_INT_pmudesc02_ecc_multi_err(unsigned int upmudesc02_ecc_multi_err);
int iSetSC_RGMII_SRC_INT_pmudesc01_ecc_multi_err(unsigned int upmudesc01_ecc_multi_err);
int iSetSC_RGMII_SRC_INT_pmudesc00_ecc_multi_err(unsigned int upmudesc00_ecc_multi_err);
int iSetSC_RGMII_SRC_INT_gmiirx0_ecc_err(unsigned int ugmiirx0_ecc_err);
int iSetSC_RGMII_SRC_INT_rdopt_ecc_err(unsigned int urdopt_ecc_err);
int iSetSC_RGMII_SRC_INT_wropt_ecc_err(unsigned int uwropt_ecc_err);
int iSetSC_RGMII_SRC_INT_coretx0_ecc_err(unsigned int ucoretx0_ecc_err);
int iSetSC_RGMII_SRC_INT_corerx0_ecc_err(unsigned int ucorerx0_ecc_err);
int iSetSC_RGMII_SRC_INT_macdio0_ecc_err(unsigned int umacdio0_ecc_err);
int iSetSC_RGMII_SRC_INT_pmutx0_ecc_err(unsigned int upmutx0_ecc_err);
int iSetSC_RGMII_SRC_INT_pmurx0_ecc_err(unsigned int upmurx0_ecc_err);
int iSetSC_RGMII_SRC_INT_pmudesc03_ecc_err(unsigned int upmudesc03_ecc_err);
int iSetSC_RGMII_SRC_INT_pmudesc02_ecc_err(unsigned int upmudesc02_ecc_err);
int iSetSC_RGMII_SRC_INT_pmudesc01_ecc_err(unsigned int upmudesc01_ecc_err);
int iSetSC_RGMII_SRC_INT_pmudesc00_ecc_err(unsigned int upmudesc00_ecc_err);
int iSetSC_RGMII_INT_MASK_gmiirx0_ecc_multi_err_int_mask(unsigned int ugmiirx0_ecc_multi_err_int_mask);
int iSetSC_RGMII_INT_MASK_rdopt_ecc_multi_err_int_mask(unsigned int urdopt_ecc_multi_err_int_mask);
int iSetSC_RGMII_INT_MASK_wropt_ecc_multi_err_int_mask(unsigned int uwropt_ecc_multi_err_int_mask);
int iSetSC_RGMII_INT_MASK_coretx0_ecc_multi_err_int_mask(unsigned int ucoretx0_ecc_multi_err_int_mask);
int iSetSC_RGMII_INT_MASK_corerx0_ecc_multi_err_int_mask(unsigned int ucorerx0_ecc_multi_err_int_mask);
int iSetSC_RGMII_INT_MASK_macdio0_ecc_multi_err_int_mask(unsigned int umacdio0_ecc_multi_err_int_mask);
int iSetSC_RGMII_INT_MASK_pmutx0_ecc_multi_err_int_mask(unsigned int upmutx0_ecc_multi_err_int_mask);
int iSetSC_RGMII_INT_MASK_pmurx0_ecc_multi_err_int_mask(unsigned int upmurx0_ecc_multi_err_int_mask);
int iSetSC_RGMII_INT_MASK_pmudesc03_ecc_multi_err_int_mask(unsigned int upmudesc03_ecc_multi_err_int_mask);
int iSetSC_RGMII_INT_MASK_pmudesc02_ecc_multi_err_int_mask(unsigned int upmudesc02_ecc_multi_err_int_mask);
int iSetSC_RGMII_INT_MASK_pmudesc01_ecc_multi_err_int_mask(unsigned int upmudesc01_ecc_multi_err_int_mask);
int iSetSC_RGMII_INT_MASK_pmudesc00_ecc_multi_err_int_mask(unsigned int upmudesc00_ecc_multi_err_int_mask);
int iSetSC_RGMII_INT_MASK_gmiirx0_ecc_err_int_mask(unsigned int ugmiirx0_ecc_err_int_mask);
int iSetSC_RGMII_INT_MASK_rdopt_ecc_err_int_mask(unsigned int urdopt_ecc_err_int_mask);
int iSetSC_RGMII_INT_MASK_wropt_ecc_err_int_mask(unsigned int uwropt_ecc_err_int_mask);
int iSetSC_RGMII_INT_MASK_coretx0_ecc_err_int_mask(unsigned int ucoretx0_ecc_err_int_mask);
int iSetSC_RGMII_INT_MASK_corerx0_ecc_err_int_mask(unsigned int ucorerx0_ecc_err_int_mask);
int iSetSC_RGMII_INT_MASK_macdio0_ecc_err_int_mask(unsigned int umacdio0_ecc_err_int_mask);
int iSetSC_RGMII_INT_MASK_pmutx0_ecc_err_int_mask(unsigned int upmutx0_ecc_err_int_mask);
int iSetSC_RGMII_INT_MASK_pmurx0_ecc_err_int_mask(unsigned int upmurx0_ecc_err_int_mask);
int iSetSC_RGMII_INT_MASK_pmudesc03_ecc_err_int_mask(unsigned int upmudesc03_ecc_err_int_mask);
int iSetSC_RGMII_INT_MASK_pmudesc02_ecc_err_int_mask(unsigned int upmudesc02_ecc_err_int_mask);
int iSetSC_RGMII_INT_MASK_pmudesc01_ecc_err_int_mask(unsigned int upmudesc01_ecc_err_int_mask);
int iSetSC_RGMII_INT_MASK_pmudesc00_ecc_err_int_mask(unsigned int upmudesc00_ecc_err_int_mask);
int iSetSC_WDG_RST_MASK_sc_wdg_ts_rst_mask(unsigned int usc_wdg_ts_rst_mask);
int iSetSC_WDG_RST_MASK_sc_wdg_security_rst_mask(unsigned int usc_wdg_security_rst_mask);
int iSetSC_WDG_RST_MASK_sc_wdg_rst_mask(unsigned int usc_wdg_rst_mask);
int iSetSC_WDG_RST_MASK_sc_wdg_ddr_uce_rst_mask(unsigned int usc_wdg_ddr_uce_rst_mask);
int iSetSC_USB3_TRACE_CTRL_sc_usb3_trace_read(unsigned int usc_usb3_trace_read);
int iSetSC_USB3_TRACE_CTRL_sc_usb3_trace_raddr(unsigned int usc_usb3_trace_raddr);
int iSetSC_USB3_TRACE_CTRL_sc_usb3_trace_point(unsigned int usc_usb3_trace_point);
int iSetSC_USB3_TRACE_CTRL_sc_usb3_trace_sel(unsigned int usc_usb3_trace_sel);
int iSetSC_USB3_TRACE_CTRL_sc_usb3_trace_clear(unsigned int usc_usb3_trace_clear);
int iSetSC_USB3_TRACE_CTRL_sc_usb3_trace_enable(unsigned int usc_usb3_trace_enable);
int iSetSC_USB3_TRACE_DATA_31_0_sc_usb3_trace_data_31_0(unsigned int usc_usb3_trace_data_31_0);
int iSetSC_USB3_TRACE_DATA_63_32_sc_usb3_trace_data_63_32(unsigned int usc_usb3_trace_data_63_32);
int iSetSC_USB3_TRACE_DATA_95_64_sc_usb3_trace_data_95_64(unsigned int usc_usb3_trace_data_95_64);
int iSetSC_USB3_TRACE_DATA_127_96_sc_usb3_trace_data_127_96(unsigned int usc_usb3_trace_data_127_96);
int iSetSC_USB3_TRACE_MASK_31_0_sc_usb3_trace_mask_31_0(unsigned int usc_usb3_trace_mask_31_0);
int iSetSC_USB3_TRACE_MASK_63_32_sc_usb3_trace_mask_63_32(unsigned int usc_usb3_trace_mask_63_32);
int iSetSC_USB3_TRACE_MASK_95_64_sc_usb3_trace_mask_95_64(unsigned int usc_usb3_trace_mask_95_64);
int iSetSC_USB3_TRACE_MASK_127_96_sc_usb3_trace_mask_127_96(unsigned int usc_usb3_trace_mask_127_96);
int iSetSC_TSENSOR_INT_MASK_tsensor_ultra_over_int_mask_aicore1(unsigned int utsensor_ultra_over_int_mask_aicore1);
int iSetSC_TSENSOR_INT_MASK_tsensor_ultra_over_int_mask_aicore0(unsigned int utsensor_ultra_over_int_mask_aicore0);
int iSetSC_TSENSOR_INT_MASK_tsensor_ultra_over_int_mask_top(unsigned int utsensor_ultra_over_int_mask_top);
int iSetSC_TSENSOR_INT_MASK_tsensor_ultra_over_int_mask_a55(unsigned int utsensor_ultra_over_int_mask_a55);
int iSetSC_TS_EN_sc_ts_en(unsigned int usc_ts_en);
int iSetSC_TIMESTAMP_CLK_SEL_sc_timestamp_clk_sel(unsigned int usc_timestamp_clk_sel);
int iSetSC_SLV_EXT_ACTIVE_sc_slv_ext_active(unsigned int usc_slv_ext_active);
int iSetSC_RING_LINK_REQ_sc_ring_link_req(unsigned int usc_ring_link_req);
int iSetSC_TEMP_PERIOD_AIC_temp_elim_period_cfg(unsigned int utemp_elim_period_cfg);
int iSetSC_TEMP_PERIOD_AIC_temp_total_period_cfg(unsigned int utemp_total_period_cfg);
int iSetSC_AXI_CACHE_USB_arcache_usb(unsigned int uarcache_usb);
int iSetSC_AXI_CACHE_USB_awcache_usb(unsigned int uawcache_usb);
int iSetSC_BYPASS_CACHE_USB_arcache_bypass_usb(unsigned int uarcache_bypass_usb);
int iSetSC_BYPASS_CACHE_USB_awcache_bypass_usb(unsigned int uawcache_bypass_usb);
int iSetSC_PLL_SRC_INT_pll5_unlock(unsigned int upll5_unlock);
int iSetSC_PLL_SRC_INT_pll4_unlock(unsigned int upll4_unlock);
int iSetSC_PLL_SRC_INT_pll3_unlock(unsigned int upll3_unlock);
int iSetSC_PLL_SRC_INT_pll2_unlock(unsigned int upll2_unlock);
int iSetSC_PLL_SRC_INT_pll1_unlock(unsigned int upll1_unlock);
int iSetSC_PLL_SRC_INT_pll0_unlock(unsigned int upll0_unlock);
int iSetSC_PLL_INT_MASK_pll5_unlock_int_mask(unsigned int upll5_unlock_int_mask);
int iSetSC_PLL_INT_MASK_pll4_unlock_int_mask(unsigned int upll4_unlock_int_mask);
int iSetSC_PLL_INT_MASK_pll3_unlock_int_mask(unsigned int upll3_unlock_int_mask);
int iSetSC_PLL_INT_MASK_pll2_unlock_int_mask(unsigned int upll2_unlock_int_mask);
int iSetSC_PLL_INT_MASK_pll1_unlock_int_mask(unsigned int upll1_unlock_int_mask);
int iSetSC_PLL_INT_MASK_pll0_unlock_int_mask(unsigned int upll0_unlock_int_mask);
int iSetSC_DJTAG_SRC_INT_djtag_sta_timeout(unsigned int udjtag_sta_timeout);
int iSetSC_DJTAG_INT_MASK_djtag_sta_timeout_int_mask(unsigned int udjtag_sta_timeout_int_mask);
int iSetSC_XTAL_CTRL_xtal_time(unsigned int uxtal_time);
int iSetSC_XTAL_CTRL_xtal_en_sw(unsigned int uxtal_en_sw);
int iSetSC_XTAL_CTRL_xtal_over(unsigned int uxtal_over);
int iSetSC_ITCR_sc_itcr(unsigned int usc_itcr);
int iSetSC_ITIR0_sc_itir0(unsigned int usc_itir0);
int iSetSC_ITOR_sc_itor(unsigned int usc_itor);
int iSetSC_CNT_DATA_CFG_sc_cnt_data_cfg(unsigned int usc_cnt_data_cfg);

int iSetSC_CNT_CTRL_test_load_time(unsigned int utest_load_time);
int iSetSC_CNT_CTRL_test_pll_en(unsigned int utest_pll_en);
int iSetSC_CNT_CTRL_test_mode_en(unsigned int utest_mode_en);
int iSetSC_IM_CTRL_in_md_type(unsigned int uin_md_type);
int iSetSC_IM_CTRL_it_md_clk(unsigned int uit_md_clk);
int iSetSC_IM_CTRL_it_md_ctrl(unsigned int uit_md_ctrl);
int iSetSC_IM_CTRL_it_md_en(unsigned int uit_md_en);
int iSetSC_IM_STAT_it_md_stat(unsigned int uit_md_stat);
int iSetSC_PROBE_SYSTEM_COUNTER_VALUE_probe_system_counter_value(unsigned int uprobe_system_counter_value);
int iSetSC_PROBE_SYSTEM_COUNTER_EN_probe_system_counter_en(unsigned int uprobe_system_counter_en);
int iSetSC_PLL_LOCK_STATUS_pll5_lock(unsigned int upll5_lock);
int iSetSC_PLL_LOCK_STATUS_pll4_lock(unsigned int upll4_lock);
int iSetSC_PLL_LOCK_STATUS_pll3_lock(unsigned int upll3_lock);
int iSetSC_PLL_LOCK_STATUS_pll2_lock(unsigned int upll2_lock);
int iSetSC_PLL_LOCK_STATUS_pll1_lock(unsigned int upll1_lock);
int iSetSC_PLL_LOCK_STATUS_pll0_lock(unsigned int upll0_lock);
int iSetSC_PLLCTRL_ST_pll_on(unsigned int upll_on);
int iSetSC_DDRC_WARM_RST_ACKED_warm_rst_acked(unsigned int uwarm_rst_acked);
int iSetSC_DDRC_IO_RESET_STATE_rst_state_ddr7(unsigned int urst_state_ddr7);
int iSetSC_DDRC_IO_RESET_STATE_rst_state_ddr6(unsigned int urst_state_ddr6);
int iSetSC_DDRC_IO_RESET_STATE_rst_state_ddr5(unsigned int urst_state_ddr5);
int iSetSC_DDRC_IO_RESET_STATE_rst_state_ddr4(unsigned int urst_state_ddr4);
int iSetSC_SDMA_CLK_ST_icg_st_sdma(unsigned int uicg_st_sdma);
int iSetSC_FTE_CLK_ST_icg_st_fte(unsigned int uicg_st_fte);
int iSetSC_SMMU_CLK_ST_icg_st_smmu(unsigned int uicg_st_smmu);
int iSetSC_MII_CLK_ST_icg_st_rgmii_bus(unsigned int uicg_st_rgmii_bus);
int iSetSC_MII_CLK_ST_icg_st_rgmii_gsf_axi(unsigned int uicg_st_rgmii_gsf_axi);
int iSetSC_MII_CLK_ST_icg_st_rgmii_sys_pub(unsigned int uicg_st_rgmii_sys_pub);
int iSetSC_MII_CLK_ST_icg_st_rgmii_gsf_125(unsigned int uicg_st_rgmii_gsf_125);
int iSetSC_MII_CLK_ST_icg_st_rgmii_crg_125(unsigned int uicg_st_rgmii_crg_125);
int iSetSC_MII_CLK_ST_icg_st_rgmii_rx(unsigned int uicg_st_rgmii_rx);
int iSetSC_USB_CLK_ST_icg_st_usb_bus_early(unsigned int uicg_st_usb_bus_early);
int iSetSC_USB_CLK_ST_icg_st_usb_suspend(unsigned int uicg_st_usb_suspend);
int iSetSC_USB_CLK_ST_icg_st_usb_pipe3p(unsigned int uicg_st_usb_pipe3p);
int iSetSC_USB_CLK_ST_icg_st_usb_utmi(unsigned int uicg_st_usb_utmi);
int iSetSC_SYS_COUNTER_CLK_ST_icg_st_sys_counter(unsigned int uicg_st_sys_counter);
int iSetSC_DDR_CLK_ST_icg_st_ddr(unsigned int uicg_st_ddr);
int iSetSC_HHA_CLK_ST_icg_st_hha1(unsigned int uicg_st_hha1);
int iSetSC_MN_CLK_ST_icg_st_mn1(unsigned int uicg_st_mn1);
int iSetSC_DDR_EXMBIST_CLK_ST_icg_st_exmbist_cfg(unsigned int uicg_st_exmbist_cfg);
int iSetSC_DDR_EXMBIST_CLK_ST_icg_st_exmbist_aclk(unsigned int uicg_st_exmbist_aclk);
int iSetSC_DDR_APB_CLK_ST_icg_st_dum_apb(unsigned int uicg_st_dum_apb);
int iSetSC_DDR_APB_CLK_ST_icg_st_p2p_m(unsigned int uicg_st_p2p_m);
int iSetSC_PROBE_CLK_ST_icg_st_probe(unsigned int uicg_st_probe);
int iSetSC_LLC_CLK_ST_icg_st_llc(unsigned int uicg_st_llc);
int iSetSC_L2BUFF_CLK_ST_icg_st_l2buff1(unsigned int uicg_st_l2buff1);
int iSetSC_PCIE_CLK_ST_icg_st_pipe(unsigned int uicg_st_pipe);
int iSetSC_PCIE_CLK_ST_icg_st_phy_jtag_tck(unsigned int uicg_st_phy_jtag_tck);
int iSetSC_PCIE_CLK_ST_icg_st_phy_cr_para(unsigned int uicg_st_phy_cr_para);
int iSetSC_I2C_CLK_ST_icg_st_i2c(unsigned int uicg_st_i2c);
int iSetSC_TIMER_CLK_ST_icg_st_timer(unsigned int uicg_st_timer);
int iSetSC_GPIO_CLK_ST_icg_st_gpio(unsigned int uicg_st_gpio);
int iSetSC_SFC_BUS_CLK_ST_icg_st_sfc_bus(unsigned int uicg_st_sfc_bus);
int iSetSC_REF_CLK_ST_icg_st_ref(unsigned int uicg_st_ref);
int iSetSC_GPIO_DB_CLK_ST_icg_st_gpio_db(unsigned int uicg_st_gpio_db);
int iSetSC_DJTAG_CLK_ST_icg_st_djtag(unsigned int uicg_st_djtag);
int iSetSC_FUNC_MBIST_CLK_ST_icg_st_func_mbist(unsigned int uicg_st_func_mbist);
int iSetSC_HPM_CLK_ST_icg_st_hpm(unsigned int uicg_st_hpm);
int iSetSC_ULTRASOC_CLK_ST_icg_st_ultrasoc(unsigned int uicg_st_ultrasoc);
int iSetSC_ULTRASOC_CLK_ST_icg_st_chie_mon(unsigned int uicg_st_chie_mon);
int iSetSC_SPMI_CLK_ST_icg_st_spmi(unsigned int uicg_st_spmi);
int iSetSC_PWM_CLK_ST_icg_st_pwm_8k(unsigned int uicg_st_pwm_8k);
int iSetSC_TIMESTAMP_CLK_ST_icg_st_timestamp(unsigned int uicg_st_timestamp);
int iSetSC_L2BUFF_MBIST_CLK_ST_icg_st_mbist_l2buff1(unsigned int uicg_st_mbist_l2buff1);
int iSetSC_L2BUFF_MBIST_CLK_ST_icg_st_mbist_l2buff0(unsigned int uicg_st_mbist_l2buff0);
int iSetSC_SRC_AI_CLK_ST_icg_st_src_ai1(unsigned int uicg_st_src_ai1);
int iSetSC_SRC_AI_CLK_ST_icg_st_src_ai0(unsigned int uicg_st_src_ai0);
int iSetSC_GIC_CPU_CLK_ST_icg_st_gic_cpu_asyn(unsigned int uicg_st_gic_cpu_asyn);
int iSetSC_CRS_CLK_ST_icg_st_crs_asyn(unsigned int uicg_st_crs_asyn);
int iSetSC_SDMA_RESET_ST_srst_st_sdma(unsigned int usrst_st_sdma);
int iSetSC_FTE_RESET_ST_srst_st_fte(unsigned int usrst_st_fte);
int iSetSC_USB_RESET_ST_srst_st_usbphy_port(unsigned int usrst_st_usbphy_port);
int iSetSC_USB_RESET_ST_srst_st_usb_vcc(unsigned int usrst_st_usb_vcc);
int iSetSC_USB_RESET_ST_srst_st_usbphy_pipe0(unsigned int usrst_st_usbphy_pipe0);
int iSetSC_USB_RESET_ST_srst_st_usbphy(unsigned int usrst_st_usbphy);
int iSetSC_MII_RESET_ST_srst_st_rgmii_gsf(unsigned int usrst_st_rgmii_gsf);
int iSetSC_MII_RESET_ST_srst_st_rgmii_mac_if(unsigned int usrst_st_rgmii_mac_if);
int iSetSC_SYS_COUNTER_RESET_ST_srst_st_sys_counter(unsigned int usrst_st_sys_counter);
int iSetSC_DDRC_RESET_ST_srst_st_ddr(unsigned int usrst_st_ddr);
int iSetSC_HHA_RESET_ST_srst_st_hha1(unsigned int usrst_st_hha1);
int iSetSC_MN_RESET_ST_srst_st_mn1(unsigned int usrst_st_mn1);
int iSetSC_DDRC_EXMBIST_RESET_ST_srst_st_exmbist_areset(unsigned int usrst_st_exmbist_areset);
int iSetSC_DDRC_EXMBIST_RESET_ST_srst_st_exmbist(unsigned int usrst_st_exmbist);
int iSetSC_DDRC_PACK_RESET_ST_srst_st_dum(unsigned int usrst_st_dum);
int iSetSC_DDRC_PACK_RESET_ST_srst_st_p2p_m(unsigned int usrst_st_p2p_m);
int iSetSC_LLC_REGS_RESET_ST_srst_st_llc(unsigned int usrst_st_llc);
int iSetSC_L2BUFF_REGS_RESET_ST_srst_st_l2buff1(unsigned int usrst_st_l2buff1);
int iSetSC_PCIE_REGS_RESET_ST_srst_st_pcie_phy(unsigned int usrst_st_pcie_phy);
int iSetSC_PCIE_REGS_RESET_ST_srst_st_por_pcie(unsigned int usrst_st_por_pcie);
int iSetSC_PCIE_REGS_RESET_ST_srst_st_pcie(unsigned int usrst_st_pcie);
int iSetSC_I2C_REGS_RESET_ST_srst_st_i2c(unsigned int usrst_st_i2c);
int iSetSC_TIMER_REGS_RESET_ST_srst_st_timer(unsigned int usrst_st_timer);
int iSetSC_GPIO_REGS_RESET_ST_srst_st_gpio(unsigned int usrst_st_gpio);
int iSetSC_SPMI_REGS_RESET_ST_srst_st_spmi(unsigned int usrst_st_spmi);
int iSetSC_USB_UTMI_REGS_RESET_ST_srst_st_usb_utmi(unsigned int usrst_st_usb_utmi);
int iSetSC_ULTRASOC_REGS_RESET_ST_ultrasoc_srst_st(unsigned int uultrasoc_srst_st);
int iSetSC_ULTRASOC_REGS_RESET_ST_chie_mon_srst_st(unsigned int uchie_mon_srst_st);
int iSetSC_CPM_REGS_RESET_ST_srst_st_cpm1(unsigned int usrst_st_cpm1);
int iSetSC_CPM_REGS_RESET_ST_srst_st_cpm0(unsigned int usrst_st_cpm0);
int iSetSC_SVFD_REGS_RESET_ST_srst_st_svfd1(unsigned int usrst_st_svfd1);
int iSetSC_SVFD_REGS_RESET_ST_srst_st_svfd0(unsigned int usrst_st_svfd0);
int iSetSC_BISR_S_RESET_ST_srst_st_bisr_s(unsigned int usrst_st_bisr_s);
int iSetSC_PWM_RESET_ST_srst_st_pwm_8k(unsigned int usrst_st_pwm_8k);
int iSetSC_BISR_RESET_ST_srst_st_bisr(unsigned int usrst_st_bisr);
int iSetSC_STATUS_TRESET_ST_srst_st_status(unsigned int usrst_st_status);
int iSetSC_AICORE0_RESET_ST_srst_st_por_aicore0(unsigned int usrst_st_por_aicore0);
int iSetSC_AICORE0_RESET_ST_srst_st_aicore0(unsigned int usrst_st_aicore0);
int iSetSC_AICORE1_RESET_ST_srst_st_por_aicore1(unsigned int usrst_st_por_aicore1);
int iSetSC_AICORE1_RESET_ST_srst_st_aicore1(unsigned int usrst_st_aicore1);
int iSetSC_CPU_RESET_ST_srst_st_por_cpu(unsigned int usrst_st_por_cpu);
int iSetSC_CPU_RESET_ST_srst_st_cpu(unsigned int usrst_st_cpu);
int iSetSC_SFC_BUS_RESET_ST_srst_st_sfc_bus(unsigned int usrst_st_sfc_bus);
int iSetSC_STAMP_RESET_ST_srst_st_timestamp(unsigned int usrst_st_timestamp);
int iSetSC_AICORE0_POWER_RESET_ST_srst_st_power_aicore0(unsigned int usrst_st_power_aicore0);
int iSetSC_AICORE1_POWER_RESET_ST_srst_st_power_aicore1(unsigned int usrst_st_power_aicore1);
int iSetSC_CPU_POWER_RESET_ST_srst_st_power_cpu(unsigned int usrst_st_power_cpu);
int iSetSC_DJTAG_RESET_ST_djtag_srst_st(unsigned int udjtag_srst_st);
int iSetSC_FUNC_MBIST_RESET_ST_srst_st_func_mbist(unsigned int usrst_st_func_mbist);
int iSetSC_HPM_RESET_ST_hpm_srst_st(unsigned int uhpm_srst_st);
int iSetSC_BISR_REPAIR_RESET_ST_srst_st_bisr_repair(unsigned int usrst_st_bisr_repair);
int iSetSC_PCIE_POWER_RESET_ST_srst_st_power_pcie(unsigned int usrst_st_power_pcie);
int iSetSC_I2C_CTRL_ST_smbus_sda_cfg_st(unsigned int usmbus_sda_cfg_st);
int iSetSC_I2C_CTRL_ST_smbus_dat_oe_cfg_st(unsigned int usmbus_dat_oe_cfg_st);
int iSetSC_I2C_CTRL_ST_smbus_dat_mux_sel_st(unsigned int usmbus_dat_mux_sel_st);
int iSetSC_I2C_CTRL_ST_smbus_scl_cfg_st(unsigned int usmbus_scl_cfg_st);
int iSetSC_I2C_CTRL_ST_smbus_clk_oe_cfg_st(unsigned int usmbus_clk_oe_cfg_st);
int iSetSC_I2C_CTRL_ST_smbus_clk_mux_sel_st(unsigned int usmbus_clk_mux_sel_st);
int iSetSC_I2C_CTRL_ST_i2c0_sda_cfg_st(unsigned int ui2c0_sda_cfg_st);
int iSetSC_I2C_CTRL_ST_i2c0_dat_oe_cfg_st(unsigned int ui2c0_dat_oe_cfg_st);
int iSetSC_I2C_CTRL_ST_i2c0_dat_mux_sel_st(unsigned int ui2c0_dat_mux_sel_st);
int iSetSC_I2C_CTRL_ST_i2c0_scl_cfg_st(unsigned int ui2c0_scl_cfg_st);
int iSetSC_I2C_CTRL_ST_i2c0_clk_oe_cfg_st(unsigned int ui2c0_clk_oe_cfg_st);
int iSetSC_I2C_CTRL_ST_i2c0_clk_mux_sel_st(unsigned int ui2c0_clk_mux_sel_st);
int iSetSC_DCIP_ST2_flag_now_bcbist1(unsigned int uflag_now_bcbist1);
int iSetSC_DCIP_ST2_flag_bcbist1(unsigned int uflag_bcbist1);
int iSetSC_DCIP_ST2_flag_now_bcbist0(unsigned int uflag_now_bcbist0);
int iSetSC_DCIP_ST2_flag_bcbist0(unsigned int uflag_bcbist0);
int iSetSC_JTAG_AUTH_ST0_jtag_auth_result_l32(unsigned int ujtag_auth_result_l32);
int iSetSC_JTAG_AUTH_ST1_jtag_auth_result_h32(unsigned int ujtag_auth_result_h32);
int iSetSC_JTAG_AUTH_STAT_afs3_dft_disable(unsigned int uafs3_dft_disable);
int iSetSC_JTAG_AUTH_STAT_afs3_djtag_disable(unsigned int uafs3_djtag_disable);
int iSetSC_JTAG_AUTH_STAT_jtag_auth_result_en(unsigned int ujtag_auth_result_en);
int iSetSC_UCE_PROG_ST_DDR1_uce_prog_state_ddrc7(unsigned int uuce_prog_state_ddrc7);
int iSetSC_UCE_PROG_ST_DDR1_uce_prog_state_ddrc6(unsigned int uuce_prog_state_ddrc6);
int iSetSC_UCE_PROG_ST_DDR1_uce_prog_state_ddrc5(unsigned int uuce_prog_state_ddrc5);
int iSetSC_UCE_PROG_ST_DDR1_uce_prog_state_ddrc4(unsigned int uuce_prog_state_ddrc4);
int iSetSC_PMUDESC00_ECC_ST_pmudesc00_multi_err_addr(unsigned int upmudesc00_multi_err_addr);
int iSetSC_PMUDESC00_ECC_ST_pmudesc00_multi_ecc_err_syn(unsigned int upmudesc00_multi_ecc_err_syn);
int iSetSC_PMUDESC00_ECC_ST_pmudesc00_err_addr(unsigned int upmudesc00_err_addr);
int iSetSC_PMUDESC00_ECC_ST_pmudesc00_ecc_err_syn(unsigned int upmudesc00_ecc_err_syn);
int iSetSC_PMUDESC01_ECC_ST_pmudesc01_multi_err_addr(unsigned int upmudesc01_multi_err_addr);
int iSetSC_PMUDESC01_ECC_ST_pmudesc01_multi_ecc_err_syn(unsigned int upmudesc01_multi_ecc_err_syn);
int iSetSC_PMUDESC01_ECC_ST_pmudesc01_err_addr(unsigned int upmudesc01_err_addr);
int iSetSC_PMUDESC01_ECC_ST_pmudesc01_ecc_err_syn(unsigned int upmudesc01_ecc_err_syn);
int iSetSC_PMUDESC02_ECC_ST_pmudesc02_multi_err_addr(unsigned int upmudesc02_multi_err_addr);
int iSetSC_PMUDESC02_ECC_ST_pmudesc02_multi_ecc_err_syn(unsigned int upmudesc02_multi_ecc_err_syn);
int iSetSC_PMUDESC02_ECC_ST_pmudesc02_err_addr(unsigned int upmudesc02_err_addr);
int iSetSC_PMUDESC02_ECC_ST_pmudesc02_ecc_err_syn(unsigned int upmudesc02_ecc_err_syn);
int iSetSC_PMUDESC03_ECC_ST_pmudesc03_multi_err_addr(unsigned int upmudesc03_multi_err_addr);
int iSetSC_PMUDESC03_ECC_ST_pmudesc03_multi_ecc_err_syn(unsigned int upmudesc03_multi_ecc_err_syn);
int iSetSC_PMUDESC03_ECC_ST_pmudesc03_err_addr(unsigned int upmudesc03_err_addr);
int iSetSC_PMUDESC03_ECC_ST_pmudesc03_ecc_err_syn(unsigned int upmudesc03_ecc_err_syn);
int iSetSC_PMURX0_ECC_ST0_pmurx0_multi_ecc_err_syn(unsigned int upmurx0_multi_ecc_err_syn);
int iSetSC_PMURX0_ECC_ST0_pmurx0_ecc_err_syn(unsigned int upmurx0_ecc_err_syn);
int iSetSC_PMURX0_ECC_ST1_pmurx0_err_addr(unsigned int upmurx0_err_addr);
int iSetSC_PMURX0_ECC_ST1_pmurx0_multi_err_addr(unsigned int upmurx0_multi_err_addr);
int iSetSC_PMUTX0_ECC_ST0_pmutx0_multi_ecc_err_syn(unsigned int upmutx0_multi_ecc_err_syn);
int iSetSC_PMUTX0_ECC_ST0_pmutx0_ecc_err_syn(unsigned int upmutx0_ecc_err_syn);
int iSetSC_PMUTX0_ECC_ST1_pmutx0_err_addr(unsigned int upmutx0_err_addr);
int iSetSC_PMUTX0_ECC_ST1_pmutx0_multi_err_addr(unsigned int upmutx0_multi_err_addr);
int iSetSC_MACDIO0_ECC_ST_macdio0_multi_err_addr(unsigned int umacdio0_multi_err_addr);
int iSetSC_MACDIO0_ECC_ST_macdio0_multi_ecc_err_syn(unsigned int umacdio0_multi_ecc_err_syn);
int iSetSC_MACDIO0_ECC_ST_macdio0_err_addr(unsigned int umacdio0_err_addr);
int iSetSC_MACDIO0_ECC_ST_macdio0_ecc_err_syn(unsigned int umacdio0_ecc_err_syn);
int iSetSC_CORERX0_ECC_ST_corerx0_multi_err_addr(unsigned int ucorerx0_multi_err_addr);
int iSetSC_CORERX0_ECC_ST_corerx0_multi_ecc_err_syn(unsigned int ucorerx0_multi_ecc_err_syn);
int iSetSC_CORERX0_ECC_ST_corerx0_err_addr(unsigned int ucorerx0_err_addr);
int iSetSC_CORERX0_ECC_ST_corerx0_ecc_err_syn(unsigned int ucorerx0_ecc_err_syn);
int iSetSC_CORETX0_ECC_ST_coretx0_multi_err_addr(unsigned int ucoretx0_multi_err_addr);
int iSetSC_CORETX0_ECC_ST_coretx0_multi_ecc_err_syn(unsigned int ucoretx0_multi_ecc_err_syn);
int iSetSC_CORETX0_ECC_ST_coretx0_err_addr(unsigned int ucoretx0_err_addr);
int iSetSC_CORETX0_ECC_ST_coretx0_ecc_err_syn(unsigned int ucoretx0_ecc_err_syn);
int iSetSC_WROPT_ECC_ST_wropt_multi_err_addr(unsigned int uwropt_multi_err_addr);
int iSetSC_WROPT_ECC_ST_wropt_multi_ecc_err_syn(unsigned int uwropt_multi_ecc_err_syn);
int iSetSC_WROPT_ECC_ST_wropt_err_addr(unsigned int uwropt_err_addr);
int iSetSC_WROPT_ECC_ST_wropt_ecc_err_syn(unsigned int uwropt_ecc_err_syn);
int iSetSC_RDOPT_ECC_ST_rdopt_multi_err_addr(unsigned int urdopt_multi_err_addr);
int iSetSC_RDOPT_ECC_ST_rdopt_multi_ecc_err_syn(unsigned int urdopt_multi_ecc_err_syn);
int iSetSC_RDOPT_ECC_ST_rdopt_err_addr(unsigned int urdopt_err_addr);
int iSetSC_RDOPT_ECC_ST_rdopt_ecc_err_syn(unsigned int urdopt_ecc_err_syn);
int iSetSC_GMIIRX0_ECC_ST_gmiirx0_multi_err_addr(unsigned int ugmiirx0_multi_err_addr);
int iSetSC_GMIIRX0_ECC_ST_gmiirx0_multi_ecc_err_syn(unsigned int ugmiirx0_multi_ecc_err_syn);
int iSetSC_GMIIRX0_ECC_ST_gmiirx0_err_addr(unsigned int ugmiirx0_err_addr);
int iSetSC_GMIIRX0_ECC_ST_gmiirx0_ecc_err_syn(unsigned int ugmiirx0_ecc_err_syn);
int iSetSC_USB_RAM0_ECC_ST_usb_ram0_ecc_err_addr(unsigned int uusb_ram0_ecc_err_addr);
int iSetSC_USB_RAM0_ECC_ST_usb_ram0_ecc_err_syn(unsigned int uusb_ram0_ecc_err_syn);
int iSetSC_USB_RAM0_ECC_ST_usb_ram0_ecc_err(unsigned int uusb_ram0_ecc_err);
int iSetSC_USB_RAM0_ECC_ST_usb_ram0_ecc_multi_err(unsigned int uusb_ram0_ecc_multi_err);
int iSetSC_USB_RAM1_ECC_ST_usb_ram1_ecc_err_addr(unsigned int uusb_ram1_ecc_err_addr);
int iSetSC_USB_RAM1_ECC_ST_usb_ram1_ecc_err_syn(unsigned int uusb_ram1_ecc_err_syn);
int iSetSC_USB_RAM1_ECC_ST_usb_ram1_ecc_err(unsigned int uusb_ram1_ecc_err);
int iSetSC_USB_RAM1_ECC_ST_usb_ram1_ecc_multi_err(unsigned int uusb_ram1_ecc_multi_err);
int iSetSC_USB_RAM2_ECC_ST_usb_ram2_ecc_err_addr(unsigned int uusb_ram2_ecc_err_addr);
int iSetSC_USB_RAM2_ECC_ST_usb_ram2_ecc_err_syn(unsigned int uusb_ram2_ecc_err_syn);
int iSetSC_USB_RAM2_ECC_ST_usb_ram2_ecc_err(unsigned int uusb_ram2_ecc_err);
int iSetSC_USB_RAM2_ECC_ST_usb_ram2_ecc_multi_err(unsigned int uusb_ram2_ecc_multi_err);
int iSetSC_USB_RAM3_ECC_ST_usb_ram3_ecc_err_addr(unsigned int uusb_ram3_ecc_err_addr);
int iSetSC_USB_RAM3_ECC_ST_usb_ram3_ecc_err_syn(unsigned int uusb_ram3_ecc_err_syn);
int iSetSC_USB_RAM3_ECC_ST_usb_ram3_ecc_err(unsigned int uusb_ram3_ecc_err);
int iSetSC_USB_RAM3_ECC_ST_usb_ram3_ecc_multi_err(unsigned int uusb_ram3_ecc_multi_err);
int iSetSC_USB3_TRACE_ST_usb3_trace_fire_addr(unsigned int uusb3_trace_fire_addr);
int iSetSC_USB3_TRACE_ST_usb3_trace_full(unsigned int uusb3_trace_full);
int iSetSC_USB3_TRACE_ST_usb3_trace_done(unsigned int uusb3_trace_done);
int iSetSC_USB3_TRACE_RDATA_31_0_sc_usb3_trace_rdata_31_0(unsigned int usc_usb3_trace_rdata_31_0);
int iSetSC_USB3_TRACE_RDATA_63_32_sc_usb3_trace_rdata_63_32(unsigned int usc_usb3_trace_rdata_63_32);
int iSetSC_USB3_TRACE_RDATA_95_64_sc_usb3_trace_rdata_95_64(unsigned int usc_usb3_trace_rdata_95_64);
int iSetSC_USB3_TRACE_RDATA_127_96_sc_usb3_trace_rdata_127_96(unsigned int usc_usb3_trace_rdata_127_96);
int iSetSC_RING_LINK_ACK_sc_ring_link_ack_io(unsigned int usc_ring_link_ack_io);
int iSetSC_RING_LINK_ACK_sc_ring_link_req_io(unsigned int usc_ring_link_req_io);
int iSetSC_RING_LINK_ACK_sc_ring_link_ack(unsigned int usc_ring_link_ack);
int iSetSC_CPU_IDLE_DIV_STAT_sc_cpu_idle_div_stat(unsigned int usc_cpu_idle_div_stat);
int iSetSC_DRAM_RETENTION_ST_sc_dram_retention_ctrl_st(unsigned int usc_dram_retention_ctrl_st);
int iSetSC_AI0_SVFD_ST0_ai0_svfd_match_result(unsigned int uai0_svfd_match_result);
int iSetSC_AI0_SVFD_ST0_ai0_svfd_glitch_result(unsigned int uai0_svfd_glitch_result);
int iSetSC_AI0_SVFD_ST0_ai0_svfd_lock(unsigned int uai0_svfd_lock);
int iSetSC_AI0_SVFD_ST1_ai0_svfd_cpm_test_out(unsigned int uai0_svfd_cpm_test_out);
int iSetSC_AI0_SVFD_ST1_ai0_svfd_cpm_data_valid(unsigned int uai0_svfd_cpm_data_valid);
int iSetSC_AI0_SVFD_ST1_ai0_svfd_cpm_data(unsigned int uai0_svfd_cpm_data);
int iSetSC_AI1_SVFD_ST0_ai1_svfd_match_result(unsigned int uai1_svfd_match_result);
int iSetSC_AI1_SVFD_ST0_ai1_svfd_glitch_result(unsigned int uai1_svfd_glitch_result);
int iSetSC_AI1_SVFD_ST0_ai1_svfd_lock(unsigned int uai1_svfd_lock);
int iSetSC_AI1_SVFD_ST1_ai1_svfd_cpm_test_out(unsigned int uai1_svfd_cpm_test_out);
int iSetSC_AI1_SVFD_ST1_ai1_svfd_cpm_data_valid(unsigned int uai1_svfd_cpm_data_valid);
int iSetSC_AI1_SVFD_ST1_ai1_svfd_cpm_data(unsigned int uai1_svfd_cpm_data);
int iSetSC_RST_SRC_sc_rst_src(unsigned int usc_rst_src);
int iSetSC_RST_SRC_FLAG_sc_rst_src_flag(unsigned int usc_rst_src_flag);
int iSetSC_MBIST_CPUI_DATAOUT_func_mbist_rdata(unsigned int ufunc_mbist_rdata);
int iSetSC_RGMII_INT_STATUS_gmiirx0_ecc_multi_err_int_status(unsigned int ugmiirx0_ecc_multi_err_int_status);
int iSetSC_RGMII_INT_STATUS_rdopt_ecc_multi_err_int_status(unsigned int urdopt_ecc_multi_err_int_status);
int iSetSC_RGMII_INT_STATUS_wropt_ecc_multi_err_int_status(unsigned int uwropt_ecc_multi_err_int_status);
int iSetSC_RGMII_INT_STATUS_coretx0_ecc_multi_err_int_status(unsigned int ucoretx0_ecc_multi_err_int_status);
int iSetSC_RGMII_INT_STATUS_corerx0_ecc_multi_err_int_status(unsigned int ucorerx0_ecc_multi_err_int_status);
int iSetSC_RGMII_INT_STATUS_macdio0_ecc_multi_err_int_status(unsigned int umacdio0_ecc_multi_err_int_status);
int iSetSC_RGMII_INT_STATUS_pmutx0_ecc_multi_err_int_status(unsigned int upmutx0_ecc_multi_err_int_status);
int iSetSC_RGMII_INT_STATUS_pmurx0_ecc_multi_err_int_status(unsigned int upmurx0_ecc_multi_err_int_status);
int iSetSC_RGMII_INT_STATUS_pmudesc03_ecc_multi_err_int_status(unsigned int upmudesc03_ecc_multi_err_int_status);
int iSetSC_RGMII_INT_STATUS_pmudesc02_ecc_multi_err_int_status(unsigned int upmudesc02_ecc_multi_err_int_status);
int iSetSC_RGMII_INT_STATUS_pmudesc01_ecc_multi_err_int_status(unsigned int upmudesc01_ecc_multi_err_int_status);
int iSetSC_RGMII_INT_STATUS_pmudesc00_ecc_multi_err_int_status(unsigned int upmudesc00_ecc_multi_err_int_status);
int iSetSC_RGMII_INT_STATUS_gmiirx0_ecc_err_int_status(unsigned int ugmiirx0_ecc_err_int_status);
int iSetSC_RGMII_INT_STATUS_rdopt_ecc_err_int_status(unsigned int urdopt_ecc_err_int_status);
int iSetSC_RGMII_INT_STATUS_wropt_ecc_err_int_status(unsigned int uwropt_ecc_err_int_status);
int iSetSC_RGMII_INT_STATUS_coretx0_ecc_err_int_status(unsigned int ucoretx0_ecc_err_int_status);
int iSetSC_RGMII_INT_STATUS_corerx0_ecc_err_int_status(unsigned int ucorerx0_ecc_err_int_status);
int iSetSC_RGMII_INT_STATUS_macdio0_ecc_err_int_status(unsigned int umacdio0_ecc_err_int_status);
int iSetSC_RGMII_INT_STATUS_pmutx0_ecc_err_int_status(unsigned int upmutx0_ecc_err_int_status);
int iSetSC_RGMII_INT_STATUS_pmurx0_ecc_err_int_status(unsigned int upmurx0_ecc_err_int_status);
int iSetSC_RGMII_INT_STATUS_pmudesc03_ecc_err_int_status(unsigned int upmudesc03_ecc_err_int_status);
int iSetSC_RGMII_INT_STATUS_pmudesc02_ecc_err_int_status(unsigned int upmudesc02_ecc_err_int_status);
int iSetSC_RGMII_INT_STATUS_pmudesc01_ecc_err_int_status(unsigned int upmudesc01_ecc_err_int_status);
int iSetSC_RGMII_INT_STATUS_pmudesc00_ecc_err_int_status(unsigned int upmudesc00_ecc_err_int_status);
int iSetSC_PLL_INT_STATUS_pll5_unlock_int_status(unsigned int upll5_unlock_int_status);
int iSetSC_PLL_INT_STATUS_pll4_unlock_int_status(unsigned int upll4_unlock_int_status);
int iSetSC_PLL_INT_STATUS_pll3_unlock_int_status(unsigned int upll3_unlock_int_status);
int iSetSC_PLL_INT_STATUS_pll2_unlock_int_status(unsigned int upll2_unlock_int_status);
int iSetSC_PLL_INT_STATUS_pll1_unlock_int_status(unsigned int upll1_unlock_int_status);
int iSetSC_PLL_INT_STATUS_pll0_unlock_int_status(unsigned int upll0_unlock_int_status);
int iSetSC_DJTAG_INT_STATUS_djtag_timeout_int_status(unsigned int udjtag_timeout_int_status);
int iSetSC_TSENSOR_INT_STATUS_tsensor_over_int_status(unsigned int utsensor_over_int_status);
int iSetSC_TSENSOR_INT_STATUS_tsensor_under_int_status(unsigned int utsensor_under_int_status);
int iSetSC_XTAL_ST_xtal_on(unsigned int uxtal_on);
int iSetSC_CNT_ST_xtal_pll_timeout(unsigned int uxtal_pll_timeout);
int iSetSC_ITIR0_TEST_sc_itir0_tst(unsigned int usc_itir0_tst);
int iSetSC_ITOR_TEST_sc_itor_tst(unsigned int usc_itor_tst);
int iSetSC_CNT_DATA_sc_cnt_data(unsigned int usc_cnt_data);
int iSetSYS_SLEEP_CFG_deepsleep_en(unsigned int udeepsleep_en);
int iSetSYS_SLEEP_STATE_sys_mode(unsigned int usys_mode);
int iSetSYS_SLEEP_STATE_sleeped(unsigned int usleeped);
int iSetSYS_SLEEP_STATE_deepsleeped(unsigned int udeepsleeped);
int iSetSYS_TCXO_CTRL_CFG_tcxodown_bypass1(unsigned int utcxodown_bypass1);
int iSetSYS_TCXO_CTRL_CFG_tcxodown_bypass0(unsigned int utcxodown_bypass0);
int iSetSYS_TCXO_CTRL_CFG_tcxoseq1_time(unsigned int utcxoseq1_time);
int iSetSYS_TCXO_CTRL_CFG_tcxoseq0_time(unsigned int utcxoseq0_time);
int iSetSYS_TCXO_CTRL_CFG_tcxoseq_bypass(unsigned int utcxoseq_bypass);
int iSetSYS_TCXO_CTRL_CFG_timeout_bypass1(unsigned int utimeout_bypass1);
int iSetSYS_TCXO_CTRL_CFG_timeout_bypass0(unsigned int utimeout_bypass0);
int iSetSYS_TCXO_CTRL_CFG_ctrlsel0_apb(unsigned int uctrlsel0_apb);
int iSetSYS_TCXO_CTRL_CFG_ctrlen0_apb(unsigned int uctrlen0_apb);
int iSetSYS_TCXO_CTRL_CFG_ctrlsel1_apb(unsigned int uctrlsel1_apb);
int iSetSYS_TCXO_CTRL_CFG_ctrlen1_apb(unsigned int uctrlen1_apb);
int iSetSYS_TCXO_CTRL_CFG_tcxofast1_ctrl(unsigned int utcxofast1_ctrl);
int iSetSYS_TCXO_CTRL_CFG_tcxofast0_ctrl(unsigned int utcxofast0_ctrl);
int iSetSYS_TCXO_CTRL_CFG_defau_tcxo(unsigned int udefau_tcxo);
int iSetSYS_TCXO_CTRL_CFG_tcxosoft_apb(unsigned int utcxosoft_apb);
int iSetSYS_TCXO_CTRL_CFG_tcxosel_apb(unsigned int utcxosel_apb);
int iSetSYS_TCXO_CTRL_CFG_tcxohardcon_bypass(unsigned int utcxohardcon_bypass);
int iSetSYS_TCXO_CTRL_CFG_tcxopresel_apb(unsigned int utcxopresel_apb);
int iSetSYS_TCXO0_TIMEOUT_timeoutcnt0_apb(unsigned int utimeoutcnt0_apb);
int iSetSYS_TCXO1_TIEOUT_timeoutcnt1_apb(unsigned int utimeoutcnt1_apb);
int iSetSYS_TCXO_CTRL_STATE_tcxoseq_finish1(unsigned int utcxoseq_finish1);
int iSetSYS_TCXO_CTRL_STATE_tcxoseq_finish0(unsigned int utcxoseq_finish0);
int iSetSYS_TCXO_CTRL_STATE_abbbuf_en1(unsigned int uabbbuf_en1);
int iSetSYS_TCXO_CTRL_STATE_abbbuf_en0(unsigned int uabbbuf_en0);
int iSetSYS_TCXO_CTRL_STATE_clkgt_ctrl1(unsigned int uclkgt_ctrl1);
int iSetSYS_TCXO_CTRL_STATE_clkgt_ctrl0(unsigned int uclkgt_ctrl0);
int iSetSYS_TCXO_CTRL_STATE_clkgt_ctrl(unsigned int uclkgt_ctrl);
int iSetSYS_TCXO_CTRL_STATE_sysclk_sel(unsigned int usysclk_sel);
int iSetSYS_TCXO_CTRL_STATE_sysclk_en1(unsigned int usysclk_en1);
int iSetSYS_TCXO_CTRL_STATE_sysclk_en0(unsigned int usysclk_en0);
int iSetSYS_TCXO_CTRL_STATE_tcxo_timeout1(unsigned int utcxo_timeout1);
int iSetSYS_TCXO_CTRL_STATE_tcxo_timeout0(unsigned int utcxo_timeout0);
int iSetSYS_TCXO_CTRL_STATE_tcxo1_en(unsigned int utcxo1_en);
int iSetSYS_TCXO_CTRL_STATE_tcxo0_en(unsigned int utcxo0_en);
int iSetSYS_PWRDN_TIME_pw_peri_pwrdowntime(unsigned int upw_peri_pwrdowntime);
int iSetSYS_PWRUP_TIME_pw_peri_pwruptime(unsigned int upw_peri_pwruptime);
int iSetSYS_PWR_CTRL_CFG_ring_link_bypass(unsigned int uring_link_bypass);
int iSetSYS_PWR_CTRL_CFG_ring_ulnk_bypass(unsigned int uring_ulnk_bypass);
int iSetSYS_PWR_CTRL_CFG_timeout_op_disiso(unsigned int utimeout_op_disiso);
int iSetSYS_PWR_CTRL_CFG_timeout_op_rston2(unsigned int utimeout_op_rston2);
int iSetSYS_PWR_CTRL_CFG_timeout_op_downperi(unsigned int utimeout_op_downperi);
int iSetSYS_PWR_CTRL_CFG_timeout_op_eniso(unsigned int utimeout_op_eniso);
int iSetSYS_PWR_CTRL_CFG_timeout_op_clkoff(unsigned int utimeout_op_clkoff);
int iSetSYS_PWR_CTRL_CFG_timeout_op_rston(unsigned int utimeout_op_rston);
int iSetSYS_PWR_CTRL_CFG_m3idle_bypass(unsigned int um3idle_bypass);
int iSetSYS_PWR_CTRL_CFG_sc_io_retention_bypass(unsigned int usc_io_retention_bypass);
int iSetSYS_PWR_CTRL_CFG_sc_ring_gten_bypass(unsigned int usc_ring_gten_bypass);
int iSetSYS_PWR_CTRL_CFG_sc_ring_clock_gten(unsigned int usc_ring_clock_gten);
int iSetSYS_PWR_CTRL_CFG_sc_peri_io_retention(unsigned int usc_peri_io_retention);
int iSetSYS_PWR_CTRL_CFG_usb_iso_en(unsigned int uusb_iso_en);
int iSetSYS_PWR_CTRL_CFG_pcie_iso_en(unsigned int upcie_iso_en);
int iSetSYS_PWR_CTRL_CFG_ai1_iso_en(unsigned int uai1_iso_en);
int iSetSYS_PWR_CTRL_CFG_ai0_iso_en(unsigned int uai0_iso_en);
int iSetSYS_PWR_CTRL_CFG_dvpp_iso_en(unsigned int udvpp_iso_en);
int iSetSYS_PWR_CTRL_CFG_ddr_iso_en(unsigned int uddr_iso_en);
int iSetSYS_PWR_CTRL_CFG_cluster_iso_en(unsigned int ucluster_iso_en);
int iSetSC_MDCTRL_lp_md_ctrl(unsigned int ulp_md_ctrl);
int iSetSC_SLEEP_sc_sleeped(unsigned int usc_sleeped);
int iSetSC_DEEPSLEEP_sc_deepsleeped(unsigned int usc_deepsleeped);
int iSetSC_DJTAG_SEC_ACC_EN_djtag_sec_acc_en(unsigned int udjtag_sec_acc_en);
int iSetSC_DJTAG_MSTR_ADDR_djtag_mstr_addr(unsigned int udjtag_mstr_addr);
int iSetSC_DJTAG_MSTR_DATA_djtag_mstr_data(unsigned int udjtag_mstr_data);
int iSetSC_DJTAG_MSTR_CFG_djtag_mstr_disable(unsigned int udjtag_mstr_disable);
int iSetSC_DJTAG_MSTR_CFG_djtag_nor_cfg_en(unsigned int udjtag_nor_cfg_en);
int iSetSC_DJTAG_MSTR_CFG_djtag_mstr_wr(unsigned int udjtag_mstr_wr);
int iSetSC_DJTAG_MSTR_CFG_debug_module_sel(unsigned int udebug_module_sel);
int iSetSC_DJTAG_MSTR_CFG_chain_unit_cfg_en(unsigned int uchain_unit_cfg_en);
int iSetSC_DJTAG_MSTR_START_EN_djtag_mstr_start_en(unsigned int udjtag_mstr_start_en);
int iSetSC_DJTAG_MSTR_PIPE_CFG_djtag_cpui_pipe_en(unsigned int udjtag_cpui_pipe_en);
int iSetSC_DJTAG_MSTR_PIPE_CFG_djtag_mstr_pipe_wait_num(unsigned int udjtag_mstr_pipe_wait_num);
int iSetSC_DJTAG_TMOUT_djtag_tmout(unsigned int udjtag_tmout);
int iSetSC_EFUSE_SECURE_INFO_djtag_ns_allow(unsigned int udjtag_ns_allow);
int iSetSC_EFUSE_SECURE_INF_AO_efuse_ai_freq_lock_ao(unsigned int uefuse_ai_freq_lock_ao);
int iSetSC_EFUSE_SECURE_INF_AO_efuse_dvpp_vdec_half_ao(unsigned int uefuse_dvpp_vdec_half_ao);
int iSetSC_EFUSE_SECURE_INF_AO_efuse_allscan_forbid_ao(unsigned int uefuse_allscan_forbid_ao);
int iSetSC_EFUSE_SECURE_INF_AO_efuse_j2djs_forbid_ao(unsigned int uefuse_j2djs_forbid_ao);
int iSetSC_EFUSE_SECURE_INF_AO_efuse_sj2tdre_forbid_ao(unsigned int uefuse_sj2tdre_forbid_ao);
int iSetSC_EFUSE_SECURE_INF_AO_efuse_dbgen_ao(unsigned int uefuse_dbgen_ao);
int iSetSC_EFUSE_SECURE_INF_AO_efuse_niden_ao(unsigned int uefuse_niden_ao);
int iSetSC_EFUSE_SECURE_INF_AO_efuse_sdbg_ctrl_ao(unsigned int uefuse_sdbg_ctrl_ao);
int iSetSC_EFUSE_SECURE_INF_AO_efuse_jtag_forbid_ao(unsigned int uefuse_jtag_forbid_ao);
int iSetSC_EFUSE_SECURE_INF_AO_efuse_key_cfged_ao(unsigned int uefuse_key_cfged_ao);
int iSetSC_EFUSE_NS_FORBID_efuse_ns_forbid_ao(unsigned int uefuse_ns_forbid_ao);
int iSetSC_EFUSE_SECURE_INF_AO1_efuse_sys_access_lock_ao(unsigned int uefuse_sys_access_lock_ao);
int iSetSC_BOOT_INFO_pad_sysclk_sel(unsigned int upad_sysclk_sel);
int iSetSC_BOOT_INFO_pad_boot_cfg(unsigned int upad_boot_cfg);
int iSetSC_BOOT_INFO_pad_a55_spi_md(unsigned int upad_a55_spi_md);
int iSetSC_BOOT_INFO_pad_i2c_slv_addr(unsigned int upad_i2c_slv_addr);
int iSetSC_BOOT_INFO_pad_emmc_sd_sel(unsigned int upad_emmc_sd_sel);
int iSetSC_BOOT_INFO_pcie_rc_ep_md(unsigned int upcie_rc_ep_md);
int iSetSC_BOOT_INFO_boot_md_info(unsigned int uboot_md_info);
int iSetSC_PAD_INFO_pad_probe_mode(unsigned int upad_probe_mode);
int iSetSC_LAST_RST_STATUS_last_rst_status(unsigned int ulast_rst_status);
int iSetSC_BOARD_CFG_INFO_board_cfg_info(unsigned int uboard_cfg_info);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_dvpp(unsigned int urepair_load_done_dvpp);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_pcie(unsigned int urepair_load_done_pcie);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_peri_llc_hha(unsigned int urepair_load_done_peri_llc_hha);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_pcie_io(unsigned int urepair_load_done_pcie_io);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_ddr0(unsigned int urepair_load_done_ddr0);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_ddr1(unsigned int urepair_load_done_ddr1);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_cpu_cluster(unsigned int urepair_load_done_cpu_cluster);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_ts(unsigned int urepair_load_done_ts);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_dvpp_l2buf(unsigned int urepair_load_done_dvpp_l2buf);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_a55_0(unsigned int urepair_load_done_a55_0);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_a55_1(unsigned int urepair_load_done_a55_1);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_a55_2(unsigned int urepair_load_done_a55_2);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_a55_3(unsigned int urepair_load_done_a55_3);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_a55_4(unsigned int urepair_load_done_a55_4);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_a55_5(unsigned int urepair_load_done_a55_5);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_a55_6(unsigned int urepair_load_done_a55_6);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_a55_7(unsigned int urepair_load_done_a55_7);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_aic_0(unsigned int urepair_load_done_aic_0);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_aic_1(unsigned int urepair_load_done_aic_1);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_aic_2(unsigned int urepair_load_done_aic_2);
int iSetSC_EFUSE_HARD_REPAIR_DONE_repair_load_done_aic_3(unsigned int urepair_load_done_aic_3);
int iSetSC_EFUSE_HARD_REPAIR_DONE_efuse_hard_repair_done2(unsigned int uefuse_hard_repair_done2);
int iSetSC_EFUSE_HARD_REPAIR_DONE_efuse_hard_repair_done1(unsigned int uefuse_hard_repair_done1);
int iSetSC_EFUSE_HARD_REPAIR_DONE_efuse_hard_repair_done0(unsigned int uefuse_hard_repair_done0);
int iSetSYSCTRL_CFG_VERSION0_sysctrl_cfg_version0(unsigned int usysctrl_cfg_version0);
int iSetSYSCTRL_CFG_MAGIC_WORD_sysctrl_cfg_magic_word(unsigned int usysctrl_cfg_magic_word);
int iSetSYSCTRL_CFG_ECO_CFG0_sysctrl_cfg_eco_cfg0(unsigned int usysctrl_cfg_eco_cfg0);
int iSetSYSCTRL_CFG_ECO_CFG1_sysctrl_cfg_eco_cfg1(unsigned int usysctrl_cfg_eco_cfg1);
int iSetSYSCTRL_CFG_ECO_CFG2_sysctrl_cfg_eco_cfg2(unsigned int usysctrl_cfg_eco_cfg2);
int iSetSYSCTRL_CFG_ECO_CFG3_sysctrl_cfg_eco_cfg3(unsigned int usysctrl_cfg_eco_cfg3);
int iSetSC_DIE_ID0_die_id31_0(unsigned int udie_id31_0);
int iSetSC_DIE_ID1_die_id63_32(unsigned int udie_id63_32);
int iSetSC_DIE_ID2_die_id95_64(unsigned int udie_id95_64);
int iSetSC_DIE_ID3_die_id127_96(unsigned int udie_id127_96);
int iSetSC_DIE_ID4_die_id159_128(unsigned int udie_id159_128);
int iSetSC_DIE_ID5_die_id191_160(unsigned int udie_id191_160);
int iSetSC_DIE_ID6_die_id223_192(unsigned int udie_id223_192);
int iSetSC_DIE_ID7_die_id255_224(unsigned int udie_id255_224);
int iSetSC_DJTAG_RD_DATA0_djtag_rd_data0(unsigned int udjtag_rd_data0);
int iSetSC_DJTAG_RD_DATA1_djtag_rd_data1(unsigned int udjtag_rd_data1);
int iSetSC_DJTAG_RD_DATA2_djtag_rd_data2(unsigned int udjtag_rd_data2);
int iSetSC_DJTAG_RD_DATA3_djtag_rd_data3(unsigned int udjtag_rd_data3);
int iSetSC_DJTAG_RD_DATA4_djtag_rd_data4(unsigned int udjtag_rd_data4);
int iSetSC_DJTAG_RD_DATA5_djtag_rd_data5(unsigned int udjtag_rd_data5);
int iSetSC_DJTAG_RD_DATA6_djtag_rd_data6(unsigned int udjtag_rd_data6);
int iSetSC_DJTAG_RD_DATA7_djtag_rd_data7(unsigned int udjtag_rd_data7);
int iSetSC_DJTAG_RD_DATA8_djtag_rd_data8(unsigned int udjtag_rd_data8);
int iSetSC_DJTAG_RD_DATA9_djtag_rd_data9(unsigned int udjtag_rd_data9);
int iSetSC_DJTAG_OP_ST_rdata_changed(unsigned int urdata_changed);
int iSetSC_DJTAG_OP_ST_debug_bus_en(unsigned int udebug_bus_en);
int iSetSC_DJTAG_OP_ST_djtag_op_done(unsigned int udjtag_op_done);
int iSetSC_DJTAG_OP_ST_unit_conflict(unsigned int uunit_conflict);
int iSetSC_USB3_ST3_usb3_debug_31_0(unsigned int uusb3_debug_31_0);
int iSetSC_USB3_ST4_usb3_debug_63_32(unsigned int uusb3_debug_63_32);
int iSetSC_USB3_ST6_usb3_logic_analyzer_trace_31_0(unsigned int uusb3_logic_analyzer_trace_31_0);
int iSetSC_USB3_ST7_usb3_logic_analyzer_trace_63_32(unsigned int uusb3_logic_analyzer_trace_63_32);
int iSetSC_USB3_PHY_ST0_avalid0(unsigned int uavalid0);
int iSetSC_USB3_PHY_ST0_chgdet0(unsigned int uchgdet0);
int iSetSC_USB3_PHY_ST0_dmsehv0(unsigned int udmsehv0);
int iSetSC_USB3_PHY_ST0_dpsehv0(unsigned int udpsehv0);
int iSetSC_USB3_PHY_ST0_fslsrcv0(unsigned int ufslsrcv0);
int iSetSC_USB3_PHY_ST0_fsvminus0(unsigned int ufsvminus0);
int iSetSC_USB3_PHY_ST0_fsvplus0(unsigned int ufsvplus0);
int iSetSC_USB3_PHY_ST0_hostdisconnect0(unsigned int uhostdisconnect0);
int iSetSC_USB3_PHY_ST0_hsrxdat0(unsigned int uhsrxdat0);
int iSetSC_USB3_PHY_ST0_hssquelch0(unsigned int uhssquelch0);
int iSetSC_USB3_PHY_ST0_idhv0(unsigned int uidhv0);
int iSetSC_USB3_PHY_ST0_otgsessvld0(unsigned int uotgsessvld0);
int iSetSC_USB3_PHY_ST0_otgsessvldhv0(unsigned int uotgsessvldhv0);
int iSetSC_USB3_PHY_ST0_vbusvalid0(unsigned int uvbusvalid0);
int iSetSC_USB3_PHY_ST0_phyclock0(unsigned int uphyclock0);
int iSetSC_NORESET_0_sc_noreset_0(unsigned int usc_noreset_0);
int iSetSC_NORESET_1_sc_noreset_1(unsigned int usc_noreset_1);
int iSetSC_NORESET_2_sc_noreset_2(unsigned int usc_noreset_2);
int iSetSC_NORESET_3_sc_noreset_3(unsigned int usc_noreset_3);
int iSetSC_NORESET_4_sc_noreset_4(unsigned int usc_noreset_4);
int iSetSC_NORESET_5_sc_noreset_5(unsigned int usc_noreset_5);
int iSetSC_NORESET_6_sc_noreset_6(unsigned int usc_noreset_6);
int iSetSC_NORESET_7_sc_noreset_7(unsigned int usc_noreset_7);
int iSetSC_NORESET_8_sc_noreset_8(unsigned int usc_noreset_8);
int iSetSC_NORESET_9_sc_noreset_9(unsigned int usc_noreset_9);
int iSetSC_NORESET_10_sc_noreset_10(unsigned int usc_noreset_10);
int iSetSC_NORESET_11_sc_noreset_11(unsigned int usc_noreset_11);
int iSetSC_NORESET_12_sc_noreset_12(unsigned int usc_noreset_12);
int iSetSC_NORESET_13_sc_noreset_13(unsigned int usc_noreset_13);
int iSetSC_NORESET_14_sc_noreset_14(unsigned int usc_noreset_14);
int iSetSC_NORESET_15_sc_noreset_15(unsigned int usc_noreset_15);
int iSetSC_SYSCTRL_LOCK_sysctrl_lock(unsigned int usysctrl_lock);
int iSetSC_SYSCTRL_UNLOCK_sysctrl_unlock(unsigned int usysctrl_unlock);
int iSetSC_PROBE_MUX_SEL_probe_mux_sel(unsigned int uprobe_mux_sel);
int iSetSC_ECO_RSV0_eco_rsv0(unsigned int ueco_rsv0);
int iSetSC_ECO_RSV1_eco_rsv1(unsigned int ueco_rsv1);
int iSetSC_ECO_RSV2_eco_rsv2(unsigned int ueco_rsv2);
int iSetSC_ECO_RSV3_eco_rsv3(unsigned int ueco_rsv3);
int iSetSC_ECO_RSV4_prototype_clk(unsigned int uprototype_clk);
int iSetSC_ECO_RSV5_prototype_rst_n(unsigned int uprototype_rst_n);
int iSetSC_SOFT_POR_RSV0_sc_soft_por_rsv0(unsigned int usc_soft_por_rsv0);
int iSetSC_SOFT_POR_RSV1_sc_soft_por_rsv1(unsigned int usc_soft_por_rsv1);
int iSetSC_SOFT_POR_RSV2_sc_soft_por_rsv2(unsigned int usc_soft_por_rsv2);
int iSetSC_SOFT_POR_RSV3_sc_soft_por_rsv3(unsigned int usc_soft_por_rsv3);
int iSetSC_MONITOR_TEST0_sc_monitor_test0(unsigned int usc_monitor_test0);
int iSetSC_MONITOR_TEST1_sc_monitor_test1(unsigned int usc_monitor_test1);
int iSetSC_VER_VER_sc_ver_num(unsigned int usc_ver_num);

#endif // __SYSCTRL_CFG_C_UNION_DEFINE_H__
